Searched refs:RegOp1 (Results 1 – 3 of 3) sorted by relevance
95 unsigned RegOp1 = Inst.getOperand(1).getReg(); in LowerCompactBranch() 98 unsigned Reg1 = Ctx.getRegisterInfo()->getEncodingValue(RegOp1); in LowerCompactBranch() 115 Inst.getOperand(0).setReg(RegOp1); in LowerCompactBranch() 94 unsigned RegOp1 = Inst.getOperand(1).getReg(); LowerCompactBranch() local
1037 MachineOperand RegOp1 = getLdStRegOp(*Rt2MI); in mergePairedInsns() local1038 MachineOperand &PairedRegOp = RtMI == &*Paired ? RegOp0 : RegOp1; in mergePairedInsns()1074 .add(RegOp1) in mergePairedInsns()
5145 Register RegOp1 = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass); in EmitInstrWithCustomInserter() local5146 BuildMI(*BB, MII, DL, TII->get(AMDGPU::V_READFIRSTLANE_B32), RegOp1) in EmitInstrWithCustomInserter()5148 Src1.setReg(RegOp1); in EmitInstrWithCustomInserter()