| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/Disassembler/ |
| H A D | PPCDisassembler.cpp | 86 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, in decodeRegisterClass() argument
88 if (RegNo >= N) in decodeRegisterClass()
90 Inst.addOperand(MCOperand::createReg(Regs[RegNo])); in decodeRegisterClass()
94 static DecodeStatus DecodeCRRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCRRCRegisterClass() argument
97 return decodeRegisterClass(Inst, RegNo, CRRegs); in DecodeCRRCRegisterClass()
100 static DecodeStatus DecodeCRBITRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCRBITRCRegisterClass() argument
103 return decodeRegisterClass(Inst, RegNo, CRBITRegs); in DecodeCRBITRCRegisterClass()
106 static DecodeStatus DecodeF4RCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeF4RCRegisterClass() argument
109 return decodeRegisterClass(Inst, RegNo, FRegs); in DecodeF4RCRegisterClass()
112 static DecodeStatus DecodeF8RCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeF8RCRegisterClass() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/Disassembler/ |
| H A D | LoongArchDisassembler.cpp | 58 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGPRRegisterClass() argument
61 if (RegNo >= 32) in DecodeGPRRegisterClass()
63 Inst.addOperand(MCOperand::createReg(LoongArch::R0 + RegNo)); in DecodeGPRRegisterClass()
68 DecodeGPRNoR0R1RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, in DecodeGPRNoR0R1RegisterClass() argument
70 if (RegNo <= 1) in DecodeGPRNoR0R1RegisterClass()
72 return DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder); in DecodeGPRNoR0R1RegisterClass()
75 static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFPR32RegisterClass() argument
78 if (RegNo >= 32) in DecodeFPR32RegisterClass()
80 Inst.addOperand(MCOperand::createReg(LoongArch::F0 + RegNo)); in DecodeFPR32RegisterClass()
84 static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFPR64RegisterClass() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/Disassembler/ |
| H A D | SystemZDisassembler.cpp | 83 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, in decodeRegisterClass() argument
86 assert(RegNo < Size && "Invalid register"); in decodeRegisterClass()
87 if (IsAddr && RegNo == 0) { in decodeRegisterClass()
88 RegNo = SystemZ::NoRegister; in decodeRegisterClass()
90 RegNo = Regs[RegNo]; in decodeRegisterClass()
91 if (RegNo == 0) in decodeRegisterClass()
94 Inst.addOperand(MCOperand::createReg(RegNo)); in decodeRegisterClass()
98 static DecodeStatus DecodeGR32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGR32BitRegisterClass() argument
101 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR32Regs, 16); in DecodeGR32BitRegisterClass()
104 static DecodeStatus DecodeGRH32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGRH32BitRegisterClass() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/ |
| H A D | RISCVDisassembler.cpp | 77 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, uint32_t RegNo, in DecodeGPRRegisterClass() argument
82 if (RegNo >= 32 || (IsRVE && RegNo >= 16)) in DecodeGPRRegisterClass()
85 MCRegister Reg = RISCV::X0 + RegNo; in DecodeGPRRegisterClass()
90 static DecodeStatus DecodeGPRF16RegisterClass(MCInst &Inst, uint32_t RegNo, in DecodeGPRF16RegisterClass() argument
95 if (RegNo >= 32 || (IsRVE && RegNo >= 16)) in DecodeGPRF16RegisterClass()
98 MCRegister Reg = RISCV::X0_H + RegNo; in DecodeGPRF16RegisterClass()
103 static DecodeStatus DecodeGPRF32RegisterClass(MCInst &Inst, uint32_t RegNo, in DecodeGPRF32RegisterClass() argument
108 if (RegNo >= 32 || (IsRVE && RegNo >= 16)) in DecodeGPRF32RegisterClass()
111 MCRegister Reg = RISCV::X0_W + RegNo; in DecodeGPRF32RegisterClass()
116 static DecodeStatus DecodeGPRX1X5RegisterClass(MCInst &Inst, uint32_t RegNo, in DecodeGPRX1X5RegisterClass() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/Disassembler/ |
| H A D | M68kDisassembler.cpp | 42 static DecodeStatus DecodeRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeRegisterClass() argument
44 if (RegNo >= 24) in DecodeRegisterClass()
46 Inst.addOperand(MCOperand::createReg(RegisterDecode[RegNo])); in DecodeRegisterClass()
50 static DecodeStatus DecodeDR32RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeDR32RegisterClass() argument
53 return DecodeRegisterClass(Inst, RegNo, Address, Decoder); in DecodeDR32RegisterClass()
56 static DecodeStatus DecodeDR16RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeDR16RegisterClass() argument
59 return DecodeRegisterClass(Inst, RegNo, Address, Decoder); in DecodeDR16RegisterClass()
62 static DecodeStatus DecodeDR8RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeDR8RegisterClass() argument
65 return DecodeRegisterClass(Inst, RegNo, Address, Decoder); in DecodeDR8RegisterClass()
68 static DecodeStatus DecodeAR32RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeAR32RegisterClass() argument
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineRegisterInfo.h | 116 MachineOperand *&getRegUseDefListHead(Register RegNo) { in getRegUseDefListHead() argument
117 if (RegNo.isVirtual()) in getRegUseDefListHead()
118 return VRegInfo[RegNo.id()].second; in getRegUseDefListHead()
119 return PhysRegUseDefLists[RegNo.id()]; in getRegUseDefListHead()
122 MachineOperand *getRegUseDefListHead(Register RegNo) const { in getRegUseDefListHead() argument
123 if (RegNo.isVirtual()) in getRegUseDefListHead()
124 return VRegInfo[RegNo.id()].second; in getRegUseDefListHead()
125 return PhysRegUseDefLists[RegNo.id()]; in getRegUseDefListHead()
286 reg_iterator reg_begin(Register RegNo) const { in reg_begin() argument
287 return reg_iterator(getRegUseDefListHead(RegNo)); in reg_begin()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/ |
| H A D | SparcDisassembler.cpp | 142 static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeIntRegsRegisterClass() argument
145 if (RegNo > 31) in DecodeIntRegsRegisterClass()
147 unsigned Reg = IntRegDecoderTable[RegNo]; in DecodeIntRegsRegisterClass()
152 static DecodeStatus DecodeI64RegsRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeI64RegsRegisterClass() argument
155 return DecodeIntRegsRegisterClass(Inst, RegNo, Address, Decoder); in DecodeI64RegsRegisterClass()
160 static DecodeStatus DecodePointerLikeRegClass0(MCInst &Inst, unsigned RegNo, in DecodePointerLikeRegClass0() argument
163 return DecodeIntRegsRegisterClass(Inst, RegNo, Address, Decoder); in DecodePointerLikeRegClass0()
166 static DecodeStatus DecodeFPRegsRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFPRegsRegisterClass() argument
169 if (RegNo > 31) in DecodeFPRegsRegisterClass()
171 unsigned Reg = FPRegDecoderTable[RegNo]; in DecodeFPRegsRegisterClass()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/ |
| H A D | HexagonDisassembler.cpp | 117 static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo,
121 DecodeGeneralSubRegsRegisterClass(MCInst &Inst, unsigned RegNo,
125 DecodeIntRegsLow8RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,
127 static DecodeStatus DecodeHvxVRRegisterClass(MCInst &Inst, unsigned RegNo,
131 DecodeDoubleRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,
134 DecodeGeneralDoubleLow8RegsRegisterClass(MCInst &Inst, unsigned RegNo,
137 static DecodeStatus DecodeHvxWRRegisterClass(MCInst &Inst, unsigned RegNo,
140 static DecodeStatus DecodeHvxVQRRegisterClass(MCInst &Inst, unsigned RegNo,
143 static DecodeStatus DecodePredRegsRegisterClass(MCInst &Inst, unsigned RegNo,
146 static DecodeStatus DecodeHvxQRRegisterClass(MCInst &Inst, unsigned RegNo,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/Disassembler/ |
| H A D | CSKYDisassembler.cpp | 108 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGPRRegisterClass() argument
111 if (RegNo >= 32) in DecodeGPRRegisterClass()
114 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo])); in DecodeGPRRegisterClass()
118 static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFPR32RegisterClass() argument
121 if (RegNo >= 32) in DecodeFPR32RegisterClass()
124 Inst.addOperand(MCOperand::createReg(FPR32DecoderTable[RegNo])); in DecodeFPR32RegisterClass()
128 static DecodeStatus DecodesFPR32RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodesFPR32RegisterClass() argument
131 if (RegNo >= 16) in DecodesFPR32RegisterClass()
134 Inst.addOperand(MCOperand::createReg(FPR32DecoderTable[RegNo])); in DecodesFPR32RegisterClass()
138 static DecodeStatus DecodesFPR64RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodesFPR64RegisterClass() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/Disassembler/ |
| H A D | XtensaDisassembler.cpp | 65 static DecodeStatus DecodeARRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeARRegisterClass() argument
68 if (RegNo >= std::size(ARDecoderTable)) in DecodeARRegisterClass()
71 MCPhysReg Reg = ARDecoderTable[RegNo]; in DecodeARRegisterClass()
76 static DecodeStatus DecodeMRRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeMRRegisterClass() argument
79 if (RegNo > 3) in DecodeMRRegisterClass()
82 MCPhysReg Reg = Xtensa::M0 + RegNo; in DecodeMRRegisterClass()
87 static DecodeStatus DecodeMR01RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeMR01RegisterClass() argument
90 if (RegNo > 1) in DecodeMR01RegisterClass()
93 MCPhysReg Reg = Xtensa::M0 + RegNo; in DecodeMR01RegisterClass()
98 static DecodeStatus DecodeMR23RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeMR23RegisterClass() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 81 static DecodeStatus DecodeGPR64RegisterClass(MCInst &Inst, unsigned RegNo,
85 static DecodeStatus DecodeCPU16RegsRegisterClass(MCInst &Inst, unsigned RegNo,
89 static DecodeStatus DecodeGPRMM16RegisterClass(MCInst &Inst, unsigned RegNo,
94 DecodeGPRMM16ZeroRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,
98 DecodeGPRMM16MovePRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,
101 static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo,
109 static DecodeStatus DecodeDSPRRegisterClass(MCInst &Inst, unsigned RegNo,
113 static DecodeStatus DecodeFGR64RegisterClass(MCInst &Inst, unsigned RegNo,
117 static DecodeStatus DecodeFGR32RegisterClass(MCInst &Inst, unsigned RegNo,
121 static DecodeStatus DecodeCCRRegisterClass(MCInst &Inst, unsigned RegNo,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsTargetStreamer.h | 57 virtual void emitDirectiveSetAtWithArg(unsigned RegNo);
101 virtual void emitDirectiveCpAdd(unsigned RegNo);
102 virtual void emitDirectiveCpLoad(unsigned RegNo);
103 virtual void emitDirectiveCpLocal(unsigned RegNo);
107 virtual void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
249 void emitDirectiveSetAtWithArg(unsigned RegNo) override;
293 void emitDirectiveCpAdd(unsigned RegNo) override;
294 void emitDirectiveCpLoad(unsigned RegNo) override;
295 void emitDirectiveCpLocal(unsigned RegNo) override;
306 void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
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| H A D | MipsTargetStreamer.cpp | 81 void MipsTargetStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) { in emitDirectiveSetAtWithArg() argument
130 void MipsTargetStreamer::emitDirectiveCpAdd(unsigned RegNo) {} in emitDirectiveCpAdd() argument
131 void MipsTargetStreamer::emitDirectiveCpLoad(unsigned RegNo) {} in emitDirectiveCpLoad() argument
132 void MipsTargetStreamer::emitDirectiveCpLocal(unsigned RegNo) { in emitDirectiveCpLocal() argument
145 GPReg = RegNo; in emitDirectiveCpLocal()
155 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset, in emitDirectiveCpsetup() argument
535 void MipsTargetAsmStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) { in emitDirectiveSetAtWithArg() argument
536 OS << "\t.set\tat=$" << Twine(RegNo) << "\n"; in emitDirectiveSetAtWithArg()
537 MipsTargetStreamer::emitDirectiveSetAtWithArg(RegNo); in emitDirectiveSetAtWithArg()
733 void MipsTargetAsmStreamer::emitDirectiveCpAdd(unsigned RegNo) { in emitDirectiveCpAdd() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/Disassembler/ |
| H A D | VEDisassembler.cpp | 129 static DecodeStatus DecodeI32RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeI32RegisterClass() argument
132 if (RegNo > 63) in DecodeI32RegisterClass()
134 unsigned Reg = I32RegDecoderTable[RegNo]; in DecodeI32RegisterClass()
139 static DecodeStatus DecodeI64RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeI64RegisterClass() argument
142 if (RegNo > 63) in DecodeI64RegisterClass()
144 unsigned Reg = I64RegDecoderTable[RegNo]; in DecodeI64RegisterClass()
149 static DecodeStatus DecodeF32RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeF32RegisterClass() argument
152 if (RegNo > 63) in DecodeF32RegisterClass()
154 unsigned Reg = F32RegDecoderTable[RegNo]; in DecodeF32RegisterClass()
159 static DecodeStatus DecodeF128RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeF128RegisterClass() argument
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | DbgEntityHistoryCalculator.cpp | 303 static void dropRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo, in dropRegDescribedVar() argument
305 const auto &I = RegVars.find(RegNo); in dropRegDescribedVar()
306 assert(RegNo != 0U && I != RegVars.end()); in dropRegDescribedVar()
317 static void addRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo, in addRegDescribedVar() argument
319 assert(RegNo != 0U); in addRegDescribedVar()
320 auto &VarSet = RegVars[RegNo]; in addRegDescribedVar()
329 static void clobberRegEntries(InlinedEntity Var, unsigned RegNo, in clobberRegEntries() argument
347 if (Entry.getInstr()->hasDebugOperandForReg(RegNo)) { in clobberRegEntries()
351 if (MO.isReg() && MO.getReg() && MO.getReg() != RegNo) in clobberRegEntries()
451 for (Register RegNo : FellowRegisters) in clobberRegisterUses() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/AsmParser/ |
| H A D | MSP430AsmParser.cpp | 191 void setReg(MCRegister RegNo) { in setReg() argument
193 Reg = RegNo; in setReg()
451 MCRegister RegNo; in ParseOperand() local
453 if (!parseRegister(RegNo, StartLoc, EndLoc)) { in ParseOperand()
454 Operands.push_back(MSP430Operand::CreateReg(RegNo, StartLoc, EndLoc)); in ParseOperand()
466 MCRegister RegNo = MSP430::PC; in ParseOperand() local
471 if (parseRegister(RegNo, RegStartLoc, EndLoc)) in ParseOperand()
477 Operands.push_back(MSP430Operand::CreateMem(RegNo, Val, StartLoc, in ParseOperand()
500 MCRegister RegNo; in ParseOperand() local
502 if (parseRegister(RegNo, RegStartLoc, EndLoc)) in ParseOperand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 39 static DecodeStatus DecodeSimpleRegisterClass(MCInst &Inst, unsigned RegNo,
43 DecodeGPR64x8ClassRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,
46 static DecodeStatus DecodeZPRMul2_MinMax(MCInst &Inst, unsigned RegNo,
49 static DecodeStatus DecodeZK(MCInst &Inst, unsigned RegNo, uint64_t Address,
52 static DecodeStatus DecodeZPR2Mul2RegisterClass(MCInst &Inst, unsigned RegNo,
55 static DecodeStatus DecodeZPR4Mul4RegisterClass(MCInst &Inst, unsigned RegNo,
59 static DecodeStatus DecodeMatrixTile(MCInst &Inst, unsigned RegNo,
66 static DecodeStatus DecodePPR2Mul2RegisterClass(MCInst &Inst, unsigned RegNo,
185 DecodeWSeqPairsClassRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr,
188 DecodeXSeqPairsClassRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/Disassembler/ |
| H A D | BPFDisassembler.cpp | 101 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRRegisterClass() argument
104 if (RegNo > 11) in DecodeGPRRegisterClass()
107 unsigned Reg = GPRDecoderTable[RegNo]; in DecodeGPRRegisterClass()
117 DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t /*Address*/, in DecodeGPR32RegisterClass() argument
119 if (RegNo > 11) in DecodeGPR32RegisterClass()
122 unsigned Reg = GPR32DecoderTable[RegNo]; in DecodeGPR32RegisterClass()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/AsmParser/ |
| H A D | XtensaAsmParser.cpp | 328 static std::unique_ptr<XtensaOperand> createReg(unsigned RegNo, SMLoc S, in createReg()
331 Op->Reg.RegNum = RegNo; in createReg()
609 MCRegister RegNo = 0; in parseRegister() local
623 RegNo = Xtensa::getUserRegister(RegCode, MRI); in parseRegister()
626 RegNo = MatchRegisterAltName(RegName); in parseRegister()
631 RegNo = MatchRegisterName(RegName); in parseRegister()
632 if (RegNo == 0) in parseRegister()
633 RegNo = MatchRegisterAltName(RegName); in parseRegister()
637 if (RegNo == 0) { in parseRegister()
643 if (!Xtensa::checkRegister(RegNo, getSTI().getFeatureBits(), RAType)) in parseRegister()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInsertWaitcnts.cpp | 346 void determineWait(InstCounterType T, int RegNo, in determineWait() argument
348 determineWait(T, {RegNo, RegNo + 1}, Wait); in determineWait()
399 for (int RegNo = Interval.first; RegNo < Interval.second; ++RegNo) { in hasOtherPendingVmemTypes() local
400 assert(RegNo < NUM_ALL_VGPRS); in hasOtherPendingVmemTypes()
401 if (VgprVmemTypes[RegNo] & ~(1 << V)) in hasOtherPendingVmemTypes()
408 for (int RegNo = Interval.first; RegNo < Interval.second; ++RegNo) { in clearVgprVmemTypes() local
409 assert(RegNo < NUM_ALL_VGPRS); in clearVgprVmemTypes()
410 VgprVmemTypes[RegNo] = 0; in clearVgprVmemTypes()
862 for (int RegNo = Interval.first; RegNo < Interval.second; ++RegNo) { in setScoreByInterval() local
863 if (RegNo < NUM_ALL_VGPRS) { in setScoreByInterval()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86Operand.h | 50 MCRegister RegNo; member
129 OS << "Reg:" << X86IntelInstPrinter::getRegisterName(Reg.RegNo); in print()
171 return Reg.RegNo; in getReg()
574 MCRegister RegNo = getReg(); in addGR32orGR64Operands() local
575 if (X86MCRegisterClasses[X86::GR64RegClassID].contains(RegNo)) in addGR32orGR64Operands()
576 RegNo = getX86SubSuperRegister(RegNo, 32); in addGR32orGR64Operands()
577 Inst.addOperand(MCOperand::createReg(RegNo)); in addGR32orGR64Operands()
582 MCRegister RegNo = getReg(); in addGR16orGR32orGR64Operands() local
583 if (X86MCRegisterClasses[X86::GR32RegClassID].contains(RegNo) || in addGR16orGR32orGR64Operands()
584 X86MCRegisterClasses[X86::GR64RegClassID].contains(RegNo)) in addGR16orGR32orGR64Operands()
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| H A D | X86AsmParser.cpp | 1129 bool MatchRegisterByName(MCRegister &RegNo, StringRef RegName, SMLoc StartLoc,
1131 bool ParseRegister(MCRegister &RegNo, SMLoc &StartLoc, SMLoc &EndLoc,
1198 bool parseSEHRegisterNumber(unsigned RegClassID, MCRegister &RegNo);
1414 bool X86AsmParser::MatchRegisterByName(MCRegister &RegNo, StringRef RegName, in MatchRegisterByName() argument
1420 RegNo = MatchRegisterName(RegName); in MatchRegisterByName()
1423 if (!RegNo) in MatchRegisterByName()
1424 RegNo = MatchRegisterName(RegName.lower()); in MatchRegisterByName()
1429 (RegNo == X86::EFLAGS || RegNo == X86::MXCSR)) in MatchRegisterByName()
1430 RegNo = MCRegister(); in MatchRegisterByName()
1436 if (RegNo == X86::RIZ || RegNo == X86::RIP || in MatchRegisterByName()
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| /freebsd/contrib/llvm-project/clang/lib/Basic/Targets/ |
| H A D | XCore.h | 71 int getEHDataRegisterNumber(unsigned RegNo) const override { in getEHDataRegisterNumber() argument
73 return (RegNo < 2) ? RegNo : -1; in getEHDataRegisterNumber()
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| H A D | Xtensa.h | 95 int getEHDataRegisterNumber(unsigned RegNo) const override { in getEHDataRegisterNumber() argument
96 return (RegNo < 2) ? RegNo : -1; in getEHDataRegisterNumber()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 75 unsigned RegNo = Reg.id(); in contains() local
76 unsigned InByte = RegNo % 8; in contains()
77 unsigned Byte = RegNo / 8; in contains()
392 unsigned getSubRegIndex(MCRegister RegNo, MCRegister SubRegNo) const;
396 const char *getName(MCRegister RegNo) const { in getName() argument
397 return RegStrings + get(RegNo).Name; in getName()
401 bool isConstant(MCRegister RegNo) const { return get(RegNo).IsConstant; } in isConstant() argument
406 bool isArtificial(MCRegister RegNo) const { return get(RegNo).IsArtificial; } in isArtificial() argument
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