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Searched refs:RegN (Results 1 – 3 of 3) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUWaitSGPRHazards.cpp73 unsigned RegN = TRI.getHWRegIndex(Reg); in sgprNumber() local
74 if (RegN > 127) in sgprNumber()
76 return RegN; in sgprNumber()
301 unsigned RegN = *RegNumber; in runOnMachineBasicBlock() local
302 unsigned PairN = (RegN >> 1) & 0x3f; in runOnMachineBasicBlock()
327 Wait |= State.SALUHazards[RegN + RegIdx] ? WA_SALU : 0; in runOnMachineBasicBlock()
328 Wait |= IsVALU && State.VALUHazards[RegN + RegIdx] ? WA_VALU : 0; in runOnMachineBasicBlock()
345 State.SALUHazards.set(RegN + RegIdx); in runOnMachineBasicBlock()
347 State.VALUHazards.set(RegN + RegIdx); in runOnMachineBasicBlock()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp1091 unsigned ImN, RegN, Width; in isLossyShiftLeft() local
1095 RegN = 1; in isLossyShiftLeft()
1104 RegN = 2; in isLossyShiftLeft()
1109 RegN = 1; in isLossyShiftLeft()
1124 RegN = 2; in isLossyShiftLeft()
1131 if (RegN != OpN) in isLossyShiftLeft()
1151 unsigned ImN, RegN; in isLossyShiftRight() local
1156 RegN = 1; in isLossyShiftRight()
1168 RegN = 2; in isLossyShiftRight()
1173 RegN = 1; in isLossyShiftRight()
[all …]
H A DHexagonConstExtenders.cpp1632 unsigned RegN = ED.OpNum; in replaceInstrExact() local
1635 if (i != RegN) in replaceInstrExact()