Searched refs:RegLo (Results 1 – 7 of 7) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 468 Register RegLo = VA.getLocReg(); in LowerReturn() local
469 assert(RegLo < CSKY::R31 && "Invalid register pair"); in LowerReturn()
470 Register RegHi = RegLo + 1; in LowerReturn()
472 Chain = DAG.getCopyToReg(Chain, DL, RegLo, Lo, Glue); in LowerReturn()
474 RetOps.push_back(DAG.getRegister(RegLo, MVT::i32)); in LowerReturn()
585 Register RegLo = VA.getLocReg(); in LowerCall() local
586 RegsToPass.push_back(std::make_pair(RegLo, Lo)); in LowerCall()
588 if (RegLo == CSKY::R3) { in LowerCall()
598 assert(RegLo < CSKY::R31 && "Invalid register pair"); in LowerCall()
599 Register RegHigh = RegLo + 1; in LowerCall()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 2853 int64_t RegLo, RegHi; in ParseRegRange() local
2860 if (!parseExpr(RegLo)) in ParseRegRange()
2868 RegHi = RegLo; in ParseRegRange()
2874 if (!isUInt<32>(RegLo)) { in ParseRegRange()
2884 if (RegLo > RegHi) { in ParseRegRange()
2889 Num = static_cast<unsigned>(RegLo); in ParseRegRange()
2890 RegWidth = 32 * ((RegHi - RegLo) + 1); in ParseRegRange()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMExpandPseudoInsts.cpp | 1928 Register RegLo = TRI->getSubReg(Reg.getReg(), ARM::gsub_0); in addExclusiveRegPair() local
1930 MIB.addReg(RegLo, Flags); in addExclusiveRegPair()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 2451 Register RegLo = RI.getSubReg(Reg, AMDGPU::sub0); in expandPostRAPseudo() local
2482 BuildMI(MF, DL, get(AMDGPU::S_ADD_U32), RegLo).addReg(RegLo).add(OpLo)); in expandPostRAPseudo()
|
| H A D | SIISelLowering.cpp | 5245 Register RegLo = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass); in EmitInstrWithCustomInserter() local
5246 BuildMI(*BB, MI, DL, TII->get(AMDGPU::S_CSELECT_B32), RegLo) in EmitInstrWithCustomInserter()
5251 .addReg(RegLo) in EmitInstrWithCustomInserter()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 19978 Register RegLo = VA.getLocReg(); in LowerCall() local
19979 RegsToPass.push_back(std::make_pair(RegLo, Lo)); in LowerCall()
20250 Register RegLo = VA.getLocReg(); in LowerReturn() local
20253 if (STI.isRegisterReservedByUser(RegLo) || in LowerReturn()
20259 Chain = DAG.getCopyToReg(Chain, DL, RegLo, Lo, Glue); in LowerReturn()
20261 RetOps.push_back(DAG.getRegister(RegLo, MVT::i32)); in LowerReturn()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 4337 Register RegLo = MF.addLiveIn(VA.getLocReg(), RC); in LowerFormalArguments_32SVR4() local
4339 SDValue ArgValueLo = DAG.getCopyFromReg(Chain, dl, RegLo, MVT::i32); in LowerFormalArguments_32SVR4()
|