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Searched refs:RegInfos (Results 1 – 10 of 10) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kRegisterInfo.td102 let RegInfos = RegInfoByHwMode<[DefaultMode], [RegInfo<8,16,16>]> in
104 let RegInfos = RegInfoByHwMode<[DefaultMode], [RegInfo<16,16,16>]> in
106 let RegInfos = RegInfoByHwMode<[DefaultMode], [RegInfo<32,32,32>]> in
110 let RegInfos = RegInfoByHwMode<[DefaultMode], [RegInfo<16,16,16>]> in
112 let RegInfos = RegInfoByHwMode<[DefaultMode], [RegInfo<32,32,32>]> in
115 let RegInfos = RegInfoByHwMode<[DefaultMode], [RegInfo<32,32,32>]> in
120 let RegInfos = RegInfoByHwMode<[DefaultMode], [RegInfo<16,16,16>]> in
122 let RegInfos = RegInfoByHwMode<[DefaultMode], [RegInfo<32,32,32>]> in
125 let RegInfos = RegInfoByHwMode<[DefaultMode], [RegInfo<32,32,32>]> in
129 let RegInfos = RegInfoByHwMode<[DefaultMode], [RegInfo<32,32,32>]> in
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/
H A DControlHeightReduction.cpp149 RegInfos.push_back(RI); in CHRScope()
153 assert(RegInfos.size() > 0 && "Empty CHRScope"); in getParentRegion()
154 Region *Parent = RegInfos[0].R->getParent(); in getParentRegion()
160 assert(RegInfos.size() > 0 && "Empty CHRScope"); in getEntryBlock()
161 return RegInfos.front().R->getEntry(); in getEntryBlock()
165 assert(RegInfos.size() > 0 && "Empty CHRScope"); in getExitBlock()
166 return RegInfos.back().R->getExit(); in getExitBlock()
177 Region *LastRegion = RegInfos.back().R; in appendable()
187 assert(RegInfos.size() > 0 && "Empty CHRScope"); in append()
188 assert(Next->RegInfos.size() > 0 && "Empty CHRScope"); in append()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DRDFRegisters.cpp31 RegInfos.resize(TRI.getNumRegs()); in PhysicalRegisterInfo()
36 RegInfo &RI = RegInfos[R]; in PhysicalRegisterInfo()
171 const RegInfo &RI = RegInfos[R]; in mapTo()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchRegisterInfo.td102 let RegInfos = GRLenRI;
187 let RegInfos = GRLenRI;
223 let isAllocatable = false, RegInfos = GRLenRI in
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVRegisterInfo.td242 let RegInfos = XLenRI;
356 let RegInfos = XLenPairRI, CopyCost = 2,
368 } // let RegInfos = XLenPairRI, DecoderMethod = "DecodeGPRPairRegisterClass"
370 let RegInfos = XLenPairRI, CopyCost = 2 in
719 let RegInfos = XLenRI;
857 let RegInfos = XLenRI;
868 let RegInfos = XLenRI in {
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.td509 let RegInfos = RegInfoByHwMode<[Hvx64, Hvx128, DefaultMode],
515 let RegInfos = RegInfoByHwMode<[Hvx64, Hvx128, DefaultMode],
521 let RegInfos = RegInfoByHwMode<[Hvx64, Hvx128, DefaultMode],
527 let RegInfos = RegInfoByHwMode<[Hvx64, Hvx128, DefaultMode],
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DRDFRegisters.h196 std::vector<RegInfo> RegInfos; member
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.td54 let RegInfos = RI;
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.td994 let RegInfos = PPRSpillFillRI;
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTarget.td266 RegInfoByHwMode RegInfos;