Searched refs:RegIndex (Results 1 – 7 of 7) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600InstrInfo.cpp | 979 unsigned R600InstrInfo::calculateIndirectAddress(unsigned RegIndex, in calculateIndirectAddress() argument 982 return RegIndex; in calculateIndirectAddress() 999 unsigned RegIndex = MI.getOperand(RegOpIdx).getImm(); in expandPostRAPseudo() local 1001 unsigned Address = calculateIndirectAddress(RegIndex, Channel); in expandPostRAPseudo() 1013 unsigned RegIndex = MI.getOperand(RegOpIdx).getImm(); in expandPostRAPseudo() local 1015 unsigned Address = calculateIndirectAddress(RegIndex, Channel); in expandPostRAPseudo() 1022 calculateIndirectAddress(RegIndex, Channel), in expandPostRAPseudo() 1161 unsigned RegIndex; in getIndirectIndexBegin() local 1163 for (RegIndex = 0, RegEnd = IndirectRC->getNumRegs(); RegIndex != RegEnd; in getIndirectIndexBegin() 1164 ++RegIndex) { in getIndirectIndexBegin() [all …]
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| H A D | R600InstrInfo.h | 227 unsigned calculateIndirectAddress(unsigned RegIndex, unsigned Channel) const;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/AsmParser/ |
| H A D | M68kAsmParser.cpp | 658 unsigned RegIndex = (unsigned)(RegisterNameLower[1] - '0'); in parseRegisterName() local 659 if (RegIndex < 8) { in parseRegisterName() 660 RegNo = getRegisterByIndex(IndexOffset + RegIndex); in parseRegisterName() 686 auto RegIndex = unsigned(RegisterNameLower[2] - '0'); in parseRegisterName() local 687 if (RegIndex < 8 && RegisterNameLower.size() == 3) { in parseRegisterName() 689 RegNo = getRegisterByIndex(16 + RegIndex); in parseRegisterName()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegisterCoalescer.cpp | 1760 SlotIndex RegIndex = Idx.getRegSlot(); in eliminateUndefCopy() local 1761 LiveRange::Segment *Seg = DstLI.getSegmentContaining(RegIndex); in eliminateUndefCopy() 1791 VNInfo *VNI = DstLI.getVNInfoAt(RegIndex); in eliminateUndefCopy() 1800 VNInfo *SVNI = SR.getVNInfoAt(RegIndex); in eliminateUndefCopy() 1801 assert(SVNI != nullptr && SlotIndex::isSameInstr(SVNI->def, RegIndex)); in eliminateUndefCopy() 1806 LIS->removeVRegDefAt(DstLI, RegIndex); in eliminateUndefCopy()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 357 void assignValueToAddress(const CallLowering::ArgInfo &Arg, unsigned RegIndex, in assignValueToAddress() 367 Register ValVReg = Arg.Regs[RegIndex]; in assignValueToAddress()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 737 void warnIfRegIndexIsAT(MCRegister RegIndex, SMLoc Loc); 6138 void MipsAsmParser::warnIfRegIndexIsAT(MCRegister RegIndex, SMLoc Loc) { in warnIfRegIndexIsAT() argument 6139 if (RegIndex && AssemblerOptions.back()->getATRegIndex() == RegIndex) in warnIfRegIndexIsAT() 6140 Warning(Loc, "used $at (currently $" + Twine(RegIndex.id()) + in warnIfRegIndexIsAT()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 3406 char RegIndex = '0' + (RegNo % 8); in getRegForInlineAsmConstraint() local 3407 char Tmp[] = {'{', RegType, RegIndex, '}', 0}; in getRegForInlineAsmConstraint()
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