| /freebsd/contrib/llvm-project/llvm/lib/MCA/HardwareUnits/ |
| H A D | RegisterFile.cpp | 111 MCPhysReg RegID = WS.getRegisterID(); in onInstructionExecuted() local
115 if (!RegID) in onInstructionExecuted()
122 MCPhysReg RenameAs = RegisterMappings[RegID].second.RenameAs; in onInstructionExecuted()
123 if (RenameAs && RenameAs != RegID) in onInstructionExecuted()
124 RegID = RenameAs; in onInstructionExecuted()
126 WriteRef &WR = RegisterMappings[RegID].first; in onInstructionExecuted()
130 for (MCPhysReg I : MRI.subregs(RegID)) { in onInstructionExecuted()
139 for (MCPhysReg I : MRI.superregs(RegID)) { in onInstructionExecuted()
231 MCPhysReg RegID = WS.getRegisterID(); in addRegisterWrite() local
235 if (!RegID) in addRegisterWrite()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/MCA/ |
| H A D | Instruction.cpp | 21 void WriteState::writeStartEvent(unsigned IID, MCPhysReg RegID, in writeStartEvent() argument
24 CRD.RegID = RegID; in writeStartEvent()
30 void ReadState::writeStartEvent(unsigned IID, MCPhysReg RegID, in writeStartEvent() argument
43 CRD.RegID = RegID; in writeStartEvent()
|
| H A D | InstrBuilder.cpp | 728 MCPhysReg RegID = 0; in createInstruction() local
737 RegID = Op.getReg(); in createInstruction()
740 RegID = RD.RegisterID; in createInstruction()
744 if (!RegID) in createInstruction()
750 NewIS->getUses()[Idx] = ReadState(RD, RegID); in createInstruction()
753 NewIS->getUses().emplace_back(RD, RegID); in createInstruction()
802 RegID = WD.isImplicitWrite() ? WD.RegisterID in createInstruction()
806 if ((WD.IsOptionalDef && !RegID) || MRI.isConstant(RegID)) { in createInstruction()
811 assert(RegID && "Expected a valid register ID!"); in createInstruction()
814 WriteState(WD, RegID, in createInstruction()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/MCA/ |
| H A D | Instruction.h | 187 MCPhysReg RegID; member
248 WriteState(const WriteDescriptor &Desc, MCPhysReg RegID,
250 : WD(&Desc), CyclesLeft(UNKNOWN_CYCLES), RegisterID(RegID), PRFID(0),
261 void setRegisterID(const MCPhysReg RegID) { RegisterID = RegID; } in setRegisterID() argument
303 void writeStartEvent(unsigned IID, MCPhysReg RegID, unsigned Cycles);
356 ReadState(const ReadDescriptor &Desc, MCPhysReg RegID) in ReadState() argument
357 : RD(&Desc), RegisterID(RegID), PRFID(0), DependentWrites(0), in ReadState()
375 void writeStartEvent(unsigned IID, MCPhysReg RegID, unsigned Cycles);
|
| /freebsd/contrib/llvm-project/llvm/tools/llvm-mca/Views/ |
| H A D | BottleneckAnalysis.h | 254 void addRegisterDep(unsigned From, unsigned To, unsigned RegID, in addRegisterDep() argument
256 addDependency(From, To, {DependencyEdge::DT_REGISTER, RegID, Cost}); in addRegisterDep()
316 void addRegisterDep(unsigned From, unsigned To, unsigned RegID, unsigned Cy);
|
| H A D | BottleneckAnalysis.cpp | 454 unsigned RegID, unsigned Cost) { in addRegisterDep() argument
458 DG.addRegisterDep(From, To + SourceSize, RegID, Cost); in addRegisterDep()
459 DG.addRegisterDep(From + SourceSize, To + (SourceSize * 2), RegID, Cost); in addRegisterDep()
462 DG.addRegisterDep(From + SourceSize, To + SourceSize, RegID, Cost); in addRegisterDep()
523 addRegisterDep(From, To, RegDep.RegID, Cycles); in onEvent()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCTargetDesc.cpp | 450 auto ClearsSuperReg = [=](unsigned RegID) { in clearsSuperRegisters() argument
453 if (GPR32RC.contains(RegID)) in clearsSuperRegisters()
461 return FPR8RC.contains(RegID) || FPR16RC.contains(RegID) || in clearsSuperRegisters()
462 FPR32RC.contains(RegID) || FPR64RC.contains(RegID) || in clearsSuperRegisters()
463 FPR128RC.contains(RegID); in clearsSuperRegisters()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCTargetDesc.cpp | 550 auto ClearsSuperReg = [=](unsigned RegID) { in clearsSuperRegisters() argument
555 if (GR32RC.contains(RegID)) in clearsSuperRegisters()
566 return VR128XRC.contains(RegID) || VR256XRC.contains(RegID); in clearsSuperRegisters()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MLRegallocEvictAdvisor.cpp | |
| H A D | MLRegAllocEvictAdvisor.cpp | 359 using RegID = unsigned; typedef in __anonb6cddc090111::MLEvictAdvisor
360 mutable DenseMap<RegID, LIFeatureComponents> CachedFeatures;
796 RegID ID = LI.reg().id(); in getLIFeatureComponents()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 8424 auto RegID = IntrinsicID == Intrinsic::amdgcn_dispatch_ptr ? in LowerINTRINSIC_WO_CHAIN() local
8426 return getPreloadedValue(DAG, *MFI, VT, RegID); in LowerINTRINSIC_WO_CHAIN()
|