Searched refs:RegEnd (Results 1 – 5 of 5) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | LiveIntervalUnion.cpp | 36 LiveRange::const_iterator RegEnd = Range.end(); in unify() local
41 if (++RegPos == RegEnd) in unify()
49 --RegEnd; in unify()
50 SegPos.insert(RegEnd->start, RegEnd->end, &VirtReg); in unify()
51 for (; RegPos != RegEnd; ++RegPos, ++SegPos) in unify()
64 LiveRange::const_iterator RegEnd = Range.end(); in extract() local
75 if (RegPos == RegEnd) in extract()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | CallingConvLower.h | 459 void addInRegsParamInfo(unsigned RegBegin, unsigned RegEnd) { in addInRegsParamInfo() argument
460 ByValRegs.push_back(ByValInfo(RegBegin, RegEnd)); in addInRegsParamInfo()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 2757 MCRegister RegEnd; in parseRegList() local
2767 if (!RegEnd) { in parseRegList()
2771 } else if (RegEnd == RISCV::X1) { in parseRegList()
2775 } else if (RegEnd == RISCV::X9 && UsesXRegs) { in parseRegList()
2782 RegEnd = Reg; in parseRegList()
2788 if (RegEnd == RISCV::X1) in parseRegList()
2800 if (RegEnd == RISCV::X8) { in parseRegList()
2808 } else if (RegEnd == RISCV::X18) { in parseRegList()
2815 RegEnd = Reg; in parseRegList()
2824 if (RegEnd == RISCV::X26) in parseRegList()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600InstrInfo.cpp | 1162 unsigned RegEnd; in getIndirectIndexBegin() local
1163 for (RegIndex = 0, RegEnd = IndirectRC->getNumRegs(); RegIndex != RegEnd; in getIndirectIndexBegin()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 2726 unsigned RegBegin, RegEnd; in LowerCall() local
2727 CCInfo.getInRegsParamInfo(CurByValIdx, RegBegin, RegEnd); in LowerCall()
2731 for (i = 0, j = RegBegin; j < RegEnd; i++, j++) { in LowerCall()
2743 offset = RegEnd - RegBegin; in LowerCall()
|