Searched refs:RegClassIDs (Results 1 – 2 of 2) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 357 SDValue createTuple(ArrayRef<SDValue> Vecs, const unsigned RegClassIDs[],
1402 static const unsigned RegClassIDs[] = { in createDTuple() local
1407 return createTuple(Regs, RegClassIDs, SubRegs); in createDTuple()
1411 static const unsigned RegClassIDs[] = { in createQTuple() local
1416 return createTuple(Regs, RegClassIDs, SubRegs); in createQTuple()
1420 static const unsigned RegClassIDs[] = {AArch64::ZPR2RegClassID, in createZTuple() local
1426 return createTuple(Regs, RegClassIDs, SubRegs); in createZTuple()
1434 static const unsigned RegClassIDs[] = {AArch64::ZPR2Mul2RegClassID, 0, in createZMulTuple() local
1438 return createTuple(Regs, RegClassIDs, SubRegs); in createZMulTuple()
1442 const unsigned RegClassIDs[], in createTuple() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 711 const unsigned RegClassIDs[], in createTuple() argument
719 auto *DesiredClass = TRI->getRegClass(RegClassIDs[NumRegs - 2]); in createTuple()
731 static const unsigned RegClassIDs[] = { in createDTuple() local
735 return createTuple(Regs, RegClassIDs, SubRegs, MIB); in createDTuple()
740 static const unsigned RegClassIDs[] = { in createQTuple() local
744 return createTuple(Regs, RegClassIDs, SubRegs, MIB); in createQTuple()
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