Searched refs:RegClassIDs (Results 1 – 2 of 2) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 362 SDValue createTuple(ArrayRef<SDValue> Vecs, const unsigned RegClassIDs[],
1398 static const unsigned RegClassIDs[] = { in createDTuple() local
1403 return createTuple(Regs, RegClassIDs, SubRegs); in createDTuple()
1407 static const unsigned RegClassIDs[] = { in createQTuple() local
1412 return createTuple(Regs, RegClassIDs, SubRegs); in createQTuple()
1416 static const unsigned RegClassIDs[] = {AArch64::ZPR2RegClassID, in createZTuple() local
1422 return createTuple(Regs, RegClassIDs, SubRegs); in createZTuple()
1430 static const unsigned RegClassIDs[] = {AArch64::ZPR2Mul2RegClassID, 0, in createZMulTuple() local
1434 return createTuple(Regs, RegClassIDs, SubRegs); in createZMulTuple()
1438 const unsigned RegClassIDs[], in createTuple() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 704 const unsigned RegClassIDs[], in createTuple() argument
712 auto *DesiredClass = TRI->getRegClass(RegClassIDs[NumRegs - 2]); in createTuple()
724 static const unsigned RegClassIDs[] = { in createDTuple() local
728 return createTuple(Regs, RegClassIDs, SubRegs, MIB); in createDTuple()
733 static const unsigned RegClassIDs[] = { in createQTuple() local
737 return createTuple(Regs, RegClassIDs, SubRegs, MIB); in createQTuple()
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