Searched refs:RegC (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TwoAddressInstructionPass.cpp | 150 bool isProfitableToCommute(Register RegA, Register RegB, Register RegC, 638 Register RegC, in isProfitableToCommute() argument 662 if (!isPlainlyKilled(MI, RegC)) in isProfitableToCommute() 678 MCRegister FromRegC = getMappedReg(RegC, SrcRegMap); in isProfitableToCommute() 699 if (!noUseAfterLastDef(RegC, Dist, LastDefC)) in isProfitableToCommute() 723 if (isRevCopyChain(RegC, RegA, MaxDataFlowEdge)) in isProfitableToCommute() 746 Register RegC = MI->getOperand(RegCIdx).getReg(); in commuteInstruction() local 761 MCRegister FromRegC = getMappedReg(RegC, SrcRegMap); in commuteInstruction()
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| H A D | TargetInstrInfo.cpp | 1335 Register RegC = OpC.getReg(); in reassociateOps() local 1345 if (RegC.isVirtual()) in reassociateOps() 1346 MRI.constrainRegClass(RegC, RC); in reassociateOps() 1430 buildMINoImplicit(*MF, MIMetadata(Root), TII->get(NewRootOpc), RegC); in reassociateOps()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 795 Register RegC = OpC.getReg(); in reassociateFMA() local 796 const TargetRegisterClass *RC = MRI.getRegClass(RegC); in reassociateFMA() 797 MRI.constrainRegClass(RegC, RC); in reassociateFMA() 935 get(FMAOpIdxInfo[Idx][InfoArrayIdxFAddInst]), RegC) in reassociateFMA() 977 get(FMAOpIdxInfo[Idx][InfoArrayIdxFAddInst]), RegC) in reassociateFMA() 1015 NewCRegPressure = BuildMI(*MF, Root.getDebugLoc(), get(FmaOp), RegC) in reassociateFMA()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 7737 Register RegC = AddMI->getOperand(IdxOtherOpd).getReg(); in genSubAdd2SubSub() local 7763 .addReg(RegC, getKillRegState(RegCIsKill)) in genSubAdd2SubSub()
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