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Searched refs:RegAltNameIndices (Results 1 – 11 of 11) sorted by relevance

/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenTarget.h64 mutable std::vector<Record *> RegAltNameIndices; variable
136 if (RegAltNameIndices.empty()) in getRegAltNameIndices()
138 return RegAltNameIndices; in getRegAltNameIndices()
H A DCodeGenTarget.cpp227 RegAltNameIndices = Records.getAllDerivedDefinitions("RegAltNameIndex"); in ReadRegAltNameIndices()
228 llvm::sort(RegAltNameIndices, LessRecord()); in ReadRegAltNameIndices()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchRegisterInfo.td58 let RegAltNameIndices = [RegAliasName] in {
92 } // RegAltNameIndices = [RegAliasName]
129 let RegAltNameIndices = [RegAliasName] in {
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVERegisterInfo.td101 let RegAltNameIndices = [AsmName] in {
167 } // RegAltNameIndices = [AsmName]
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYRegisterInfo.td51 let RegAltNameIndices = [ABIRegAltName] in {
102 let RegAltNameIndices = [ABIRegAltName] in {
/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DRegisterInfoEmitter.cpp155 const std::vector<Record *> &RegAltNameIndices = in runEnums() local
159 if (RegAltNameIndices.size() > 1) { in runEnums()
164 for (unsigned i = 0, e = RegAltNameIndices.size(); i != e; ++i) in runEnums()
165 OS << " " << RegAltNameIndices[i]->getName() << ",\t// " << i << "\n"; in runEnums()
166 OS << " NUM_TARGET_REG_ALT_NAMES = " << RegAltNameIndices.size() << "\n"; in runEnums()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVRegisterInfo.td84 let RegAltNameIndices = [ABIRegAltName] in {
201 let RegAltNameIndices = [ABIRegAltName] in {
573 let RegAltNameIndices = [ABIRegAltName] in {
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRRegisterInfo.td78 let RegAltNameIndices = [ptr] in {
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMRegisterInfo.td94 let RegAltNameIndices = [RegNamesRaw] in {
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.td382 let SubRegIndices = [ssub], RegAltNameIndices = [vreg, vlist1] in {
417 let SubRegIndices = [dsub], RegAltNameIndices = [vreg, vlist1] in {
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTarget.td184 // RegAltNameIndices - The alternate name indices which are valid for this
186 list<RegAltNameIndex> RegAltNameIndices = [];