Searched refs:Reg32 (Results 1 – 7 of 7) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFixBrTableDefaults.cpp | 74 Register Reg32 = in fixBrTableIndex() local
77 WST.getInstrInfo()->get(WebAssembly::I32_WRAP_I64), Reg32) in fixBrTableIndex()
79 MI.getOperand(0).setReg(Reg32); in fixBrTableIndex()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 235 const Register Reg32 = RI.getSubReg(Reg64, SystemZ::subreg_l32); in expandLoadStackGuard() local
241 BuildMI(*MBB, MI, MI->getDebugLoc(), get(SystemZ::EAR), Reg32) in expandLoadStackGuard()
252 BuildMI(*MBB, MI, MI->getDebugLoc(), get(SystemZ::EAR), Reg32) in expandLoadStackGuard()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 1353 unsigned Reg32 = TRI->getSubReg(DstReg, AArch64::sub_32); in expandMI() local
1356 .addDef(Reg32) in expandMI()
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| H A D | AArch64InstrInfo.cpp | 2196 unsigned Reg32 = TRI->getSubReg(Reg, AArch64::sub_32); in expandPostRAPseudo() local
2198 .addDef(Reg32, RegState::Dead) in expandPostRAPseudo()
2238 unsigned Reg32 = TRI->getSubReg(Reg, AArch64::sub_32); in expandPostRAPseudo() local
2240 .addDef(Reg32, RegState::Dead) in expandPostRAPseudo()
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| H A D | AArch64FastISel.cpp | 3996 Register Reg32 = fastEmitInst_extractsubreg(MVT::i32, SrcReg, in selectTrunc() local
3999 ResultReg = emitAnd_ri(MVT::i32, Reg32, Mask); in selectTrunc()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVInstructionSelector.cpp | 3657 Register Reg32; in selectFirstBitSet64() local
3665 Reg32 = GR.getOrCreateConstInt(32, I, ResType, TII, ZeroAsNull); in selectFirstBitSet64()
3674 Reg32 = GR.getOrCreateConstVector(32, I, ResType, TII, ZeroAsNull); in selectFirstBitSet64()
3681 Register PrimaryShiftReg = Reg32; in selectFirstBitSet64()
3690 SecondaryShiftReg = Reg32; in selectFirstBitSet64()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 6274 Register Reg32 = RI.getSubReg(Reg, X86::sub_32bit); in expandPostRAPseudo() local
6276 MIB->getOperand(0).setReg(Reg32); in expandPostRAPseudo()
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