Searched refs:Reductions (Results 1 – 14 of 14) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Vectorize/ |
| H A D | LoopVectorizationLegality.h | 290 const ReductionList &getReductionVars() const { return Reductions; } in getReductionVars()
331 bool isReductionVariable(PHINode *PN) const { return Reductions.count(PN); } in isReductionVariable()
503 ReductionList Reductions; variable
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VVPNodes.def | 75 /// Reductions.
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| H A D | VVPInstrInfo.td | 186 // Reductions
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 545 Reductions = 0x02, enumerator
548 All = Reductions | Recurrences | Simple | Reverse
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | LoopInterchange.cpp | 860 SmallPtrSetImpl<PHINode *> &Reductions) { in areInnerLoopExitPHIsSupported() argument
866 if (any_of(PHI.users(), [&Reductions, OuterL](User *U) { in areInnerLoopExitPHIsSupported()
869 (!Reductions.count(PN) && OuterL->contains(PN->getParent())); in areInnerLoopExitPHIsSupported()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | LoopVectorizationLegality.cpp | 832 Reductions[Phi] = RedDes; in canVectorizeInstrs()
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGOpenMPRuntime.h | 118 llvm::Value *Reductions = nullptr; member
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| H A D | CGStmtOpenMP.cpp | 4745 Data.Reductions = CGM.getOpenMPRuntime().emitTaskReductionInit( in EmitOMPTaskBasedDirective()
4932 if (Data.Reductions) { in EmitOMPTaskBasedDirective()
5222 if (Data.Reductions) { in processInReduction()
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| H A D | CGOpenMPRuntime.cpp | 4683 if (Data.Reductions) { in emitTaskLoopCall()
4684 CGF.EmitStoreOfScalar(Data.Reductions, RedLVal); in emitTaskLoopCall()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | VPIntrinsics.def | 647 ///// Reductions {
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| H A D | Intrinsics.td | 2216 // Reductions
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.cpp | 154 setEnableBit(TailFoldingOpts::Reductions); in operator =()
160 setDisableBit(TailFoldingOpts::Reductions); in operator =()
4348 Required |= TailFoldingOpts::Reductions; in preferPredicateOverEpilogue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVSchedSiFiveP600.td | 93 // VEXQ1 handle Complex Slide, Permutation, Reductions, Divide instructions.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyInstrSIMD.td | 962 // Reductions already return 0 or 1, so and 1, setne 0, and seteq 1
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