| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCodeGenPrepare.cpp | 812 Value *Rcp = Builder.CreateUnaryIntrinsic(Intrinsic::amdgcn_rcp, FrexpMant); in emitRcpIEEE1ULP() local
813 return Builder.CreateCall(getLdexpF32(), {Rcp, ScaleFactor}); in emitRcpIEEE1ULP()
831 Value *Rcp = in emitFrexpDiv() local
835 Value *Mul = Builder.CreateFMul(FrexpMantLHS, Rcp); in emitFrexpDiv()
1048 Value *Rcp = optimizeWithRcp(Builder, Num, Den, DivFMF, FDivInst); in visitFDivElement() local
1049 if (Rcp) in visitFDivElement()
1050 return Rcp; in visitFDivElement()
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| H A D | AMDGPULegalizerInfo.cpp | 4594 auto Rcp = B.buildInstr(AMDGPU::G_AMDGPU_RCP_IFLAG, {S32}, {Mad}); in emitReciprocalU64() local
4596 S32, Rcp, B.buildFConstant(S32, llvm::bit_cast<float>(0x5f7ffffc))); in emitReciprocalU64()
4626 auto Rcp = B.buildMergeLikeInstr(S64, {RcpLo, RcpHi}); in legalizeUnsignedDIV_REM64Impl() local
4631 auto MulLo1 = B.buildMul(S64, NegDenom, Rcp); in legalizeUnsignedDIV_REM64Impl()
4632 auto MulHi1 = B.buildUMulH(S64, Rcp, MulLo1); in legalizeUnsignedDIV_REM64Impl()
4964 auto Rcp = B.buildIntrinsic(Intrinsic::amdgcn_rcp, {S32}) in legalizeFDIV16() local
4967 auto Quot = B.buildFMul(S32, LHSExt, Rcp, Flags); in legalizeFDIV16()
4971 Quot = B.buildFMAD(S32, Err, Rcp, Quot, Flags); in legalizeFDIV16()
4975 Quot = B.buildFMA(S32, Err, Rcp, Quot, Flags); in legalizeFDIV16()
4978 auto Tmp = B.buildFMul(S32, Err, Rcp, Flags); in legalizeFDIV16()
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| H A D | SIISelLowering.cpp | 11255 SDValue Rcp = in LowerFDIV16() local
11258 DAG.getNode(ISD::FMUL, SL, MVT::f32, LHSExt, Rcp, Op->getFlags()); in LowerFDIV16()
11261 Quot = DAG.getNode(FMADOpCode, SL, MVT::f32, Err, Rcp, Quot, Op->getFlags()); in LowerFDIV16()
11264 SDValue Tmp = DAG.getNode(ISD::FMUL, SL, MVT::f32, Err, Rcp, Op->getFlags()); in LowerFDIV16()
11474 SDValue Rcp = DAG.getNode(AMDGPUISD::RCP, SL, MVT::f64, DivScale0); in LowerFDIV64() local
11476 SDValue Fma0 = DAG.getNode(ISD::FMA, SL, MVT::f64, NegDivScale0, Rcp, One); in LowerFDIV64()
11478 SDValue Fma1 = DAG.getNode(ISD::FMA, SL, MVT::f64, Rcp, Fma0, Rcp); in LowerFDIV64()
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| H A D | AMDGPUISelLowering.cpp | 2132 SDValue Rcp = DAG.getNode(AMDGPUISD::RCP, DL, MVT::f32, Mad1); in LowerUDIVREM64() local
2133 SDValue Mul1 = DAG.getNode(ISD::FMUL, DL, MVT::f32, Rcp, in LowerUDIVREM64()
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| /freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | BuiltinsNVPTX.td | 399 // Rcp
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IntrinsicsNVVM.td | 1006 // Rcp
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXIntrinsics.td | 1437 // Rcp
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