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/freebsd/crypto/openssl/doc/designs/quic-design/images/
H A Dconnection-state-machine.plantuml22 PROACTIVE_VER_NEG --> PRE_INITIAL : RX:VER_NEG
25 INITIAL_EXCHANGE_A --> INITIAL_EXCHANGE_B : RX:RETRY
26 INITIAL_EXCHANGE_A --> INITIAL_EXCHANGE_CONTINUED : RX:INITIAL
27 INITIAL_EXCHANGE_A --> REACTIVE_VER_NEG : RX:VER_NEG
31 INITIAL_EXCHANGE_B --> INITIAL_EXCHANGE_CONTINUED : RX:INITIAL
34 HANDSHAKE --> HANDSHAKE_CONTINUED : RX:HANDSHAKE
36 HANDSHAKE_COMPLETED --> HANDSHAKE_CONFIRMED : RX:1RTT[HANDSHAKE_DONE]
45 CLOSING --> DRAINING : RX:ANY[CONNECTION_CLOSE]
53 TERMINATING --> TERMINATED : TERMINATING_TIMEOUT, RX:STATELESS_RESET
56 ACTIVE --> DRAINING : RX:ANY[CONNECTION_CLOSE]
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dmicrel-ksz90x1.txt49 - rxdv-skew-ps : Skew control of RX CTL pad
52 - rxd0-skew-ps : Skew control of RX data 0 pad
53 - rxd1-skew-ps : Skew control of RX data 1 pad
54 - rxd2-skew-ps : Skew control of RX data 2 pad
55 - rxd3-skew-ps : Skew control of RX data 3 pad
137 - rxc-skew-ps : Skew control of RX clock pad
142 - rxdv-skew-ps : Skew control of RX CTL pad
144 - rxd0-skew-ps : Skew control of RX data 0 pad
145 - rxd1-skew-ps : Skew control of RX data 1 pad
146 - rxd2-skew-ps : Skew control of RX data 2 pad
[all …]
H A Dxilinx_axienet.txt7 segments of memory for buffering TX and RX, as well as the capability of
8 offloading TX/RX checksum calculation off the processor.
24 - interrupts : Should be a list of 2 or 3 interrupts: TX DMA, RX DMA,
26 specified, the TX/RX DMA interrupts should be on that node
41 - xlnx,rxcsum : Same values as xlnx,txcsum but for RX checksum offload
66 device (DMA registers and DMA TX/RX interrupts) rather
H A Dlantiq,xrx200-net.txt9 - interrupts : TX and RX DMA interrupts. Use interrupt-names "tx" for
10 : the TX interrupt and "rx" for the RX interrupt.
/freebsd/crypto/openssl/doc/designs/quic-design/
H A Dconnection-state-machine.md263 <td>—<tt>RX:ANY[CONNECTION_CLOSE]</tt>→</td>
267 <td>—<tt>RX:STATELESS_RESET</tt>→</td>
274 <td>—<tt>RX:VER_NEG</tt>→</td>
294 <td>—<tt>RX:RETRY</tt>→</td>
298 <td>—<tt>RX:INITIAL</tt>→</td>
302 <td>—<tt>RX:VER_NEG</tt>→</td>
320 <td>—<tt>RX:INITIAL</tt>→</td>
334 <td>—<tt>RX:INITIAL</tt>→</td>
345 <td>—<tt>RX:HANDSHAKE</tt>→</td>
349 <td>—<tt>RX:INITIAL</tt>→</td>
[all …]
H A Dquic-fc.md65 - (RX side only) **Retirement**, which refers to where we dequeue one or more
69 Retirement is an important factor in our RX flow control design, as we want
73 - (RX side only) The **Retired Watermark** (RWM), the total number of retired
77 sent (for the TX side) or received (for the RX side). This represents the
79 and never decreases. On the RX side, such bytes have not necessarily been
89 - (RX side only) The **threshold**, which is how close we let the RWM
93 - (RX side only) The **window size**, which is the amount by which we or a peer
175 Connection-Level Flow Control - RX Side
178 ---> event: On RX Controlled Bytes (numBytes) [internal event]
183 RX side connection-level flow control provides an indication of when to generate
[all …]
H A Drx-depacketizer.md1 RX depacketizer
7 In the [overview], this is called the "RX Frame Handler". The name "RX
25 `include/internal/quic_record_rx.h` in [QUIC Demuxer and Record Layer (RX+TX)].
30 The RX depacketizer receives a packet from the QUIC Read Record Layer, and
38 There are a number of other components that the RX depacketizer wants to
51 there's a "Connection State Machine" that the "RX Frame Handler" isn't
70 [QUIC Demuxer and Record Layer (RX+TX)].
171 [QUIC Demuxer and Record Layer (RX+TX)]: https://github.com/openssl/openssl/pull/18949
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dnvidia,tegra30-ahub.txt59 For RX CIFs, the numbers indicate the register number within AHUB routing
60 register space (APBIF 0..3 RX, I2S 0..5 RX, DAM 0..2 RX 0..1, SPDIF RX 0..1).
H A Domap-mcbsp.txt16 <RX irq>;
30 <0 63 0x4>, /* RX interrupt */
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrFormats.td77 // Format< OP[6] | RZ[5] | RX[5] | IMM[16] >
129 // Format< OP[6] | SOP[5] | RX[5] | 0000000000000000[16] >
141 // Format< OP[6] | SOP[5] | RX[5] | 00000000000000[14] | IMM[2] >
168 // Format< OP[6] | SOP[5] | RX[5] | IMM16[16] >
181 // Format< OP[6] | SOP[5] | RX[5] | OFFSET[16] >
195 // Format< OP[6] | RZ[5] | RX[5] | SOP[4] | IMM[12] >
236 // Format< OP[6] | RZ[5] | RX[5] | SOP[4] | OFFSET[12] >
242 // Format< OP[6] | RZ[5] | RX[5] | SOP[4] | OFFSET[12] >
262 // Format< OP[6] | RZ[5] | RX[5] | SOP[6] | PCODE[5] | IMM[5]>
280 // Format< OP[6] | IMM[5] | RX[5] | SOP[6] | PCODE[5] | RZ[5]>
[all …]
/freebsd/sys/dev/qat/qat_common/
H A Dadf_cfg_instance.c41 bundle->rings[i]->mode == RX) { in crypto_instance_init()
53 bundle->rings[i]->mode == RX) { in crypto_instance_init()
85 bundle->rings[i]->mode == RX) { in dc_instance_init()
117 bundle->rings[i]->mode == RX) { in asym_instance_init()
149 bundle->rings[i]->mode == RX) { in sym_instance_init()
/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-gxbb-nanopi-k2.dts240 gpio-line-names = "UART TX", "UART RX", "Power Control", "Power Key In",
251 "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
252 "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
253 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
289 "Bluetooth UART TX", "Bluetooth UART RX",
H A Dmeson-gxbb-odroidc2.dts283 gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
294 "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
295 "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
296 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap2430.dtsi181 <60>, /* RX interrupt */
182 <61>; /* RX overflow interrupt */
198 <63>; /* RX interrupt */
214 <90>; /* RX interrupt */
230 <55>; /* RX interrupt */
246 <82>; /* RX interrupt */
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6ull-dhcom-drc02.dts23 * The signals for CAN2 TX and RX are routed to the DHCOM UART1 RTS/CTS pins.
55 * GPIO line, however the i.MX6ULL UART driver assumes RX happens
57 * line. Hence, the RX is always enabled here.
/freebsd/sys/contrib/device-tree/src/riscv/starfive/
H A Djh7100-starfive-visionfive-v1.dts27 * manual adjustment of the RX internal delay to work properly. The default
28 * RX delay provided by the driver (1.95ns) is too high, but applying a 50%
/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dsama5d3_can.dtsi19 …<AT91_PIOD 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1…
27 <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B RX, conflicts with GCRS */
/freebsd/sys/dev/enetc/
H A Denetc.h124 ENETC_RD4((sc), ENETC_BDR(RX, q, reg))
126 ENETC_WR4((sc), ENETC_BDR(RX, q, reg), value)
/freebsd/sys/dev/mlx4/mlx4_en/
H A Dmlx4_en_cq.c75 if (mode == RX) { in mlx4_en_create_cq()
128 if (cq->is_tx == RX) { in mlx4_en_activate_cq()
192 cq->is_tx == RX) in mlx4_en_destroy_cq()
/freebsd/sys/contrib/device-tree/Bindings/media/i2c/
H A Dtc358743.txt1 * Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge
3 The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts
H A Dtoshiba,tc358743.txt1 * Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge
3 The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts
/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Drzg2ul-smarc-pinfunction.dtsi17 <RZG2L_PORT_PINMUX(1, 2, 3)>; /* RX */
31 <RZG2L_PORT_PINMUX(2, 1, 3)>; /* RX */
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Datmel-usart.txt28 associated channel and the second one must be RX associated channel.
31 "rx" for RX channel.
41 - atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO
/freebsd/contrib/libpcap/msdos/
H A Dpkt_rx1.s11 %define NUM_RX_BUF 32 ; # of RX element buffers
23 .rxBuffer resb ETH_MTU ; RX buffer
35 _pktRxBuf resb (RX_SIZE*NUM_RX_BUF) ; RX structures
/freebsd/sys/contrib/device-tree/src/arm64/amd/
H A Damd-seattle-xgbe-b.dtsi12 <0 0xe1240800 0 0x00400>, /* SERDES RX/TX0 */
38 <0 0xe1240c00 0 0x00400>, /* SERDES RX/TX1 */

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