Searched refs:RUs (Results 1 – 5 of 5) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | VPlanAnalysis.cpp | 492 SmallVector<VPRegisterUsage, 8> RUs(VFs.size()); in calculateRegisterUsageForPlan() local
641 RUs[Idx] = RU; in calculateRegisterUsageForPlan()
644 return RUs; in calculateRegisterUsageForPlan()
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| H A D | LoopVectorize.cpp | 4256 SmallVector<VPRegisterUsage, 8> RUs; in selectVectorizationFactor() local
4259 RUs = calculateRegisterUsageForPlan(*P, VFs, TTI, CM.ValuesToIgnore); in selectVectorizationFactor()
4269 if (CM.useMaxBandwidth(VF) && RUs[I].exceedsMaxNumRegs(TTI)) in selectVectorizationFactor()
7023 SmallVector<VPRegisterUsage, 8> RUs; in computeBestVF() local
7026 RUs = calculateRegisterUsageForPlan(*P, VFs, TTI, CM.ValuesToIgnore); in computeBestVF()
7051 if (CM.useMaxBandwidth(VF) && RUs[I].exceedsMaxNumRegs(TTI)) { in computeBestVF()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RDFLiveness.cpp | 802 RefMap &RUs = RealUseMap[PA.Id]; in computeLiveIns() local
803 if (RUs.empty()) in computeLiveIns()
828 for (const std::pair<const RegisterId, NodeRefSet> &RS : RUs) { in computeLiveIns()
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| H A D | MachineLICM.cpp | 454 BitVector &RUs, in applyBitsNotInRegMaskToRegUnitsMask() argument
503 RUs |= RUsFromRegsNotInMask; in applyBitsNotInRegMaskToRegUnitsMask()
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | RegisterInfoEmitter.cpp | 960 const SparseBitVector<> &RUs = Reg.getNativeRegUnits(); in runMCDesc() local
961 DiffSeqs.add(diffEncode(RegUnitLists[i], RUs)); in runMCDesc()
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