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Searched refs:RSrc (Results 1 – 5 of 5) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.h146 bool SelectMUBUFScratchOffen(SDNode *Parent, SDValue Addr, SDValue &RSrc,
H A DAMDGPULegalizerInfo.cpp5935 Register RSrc = MI.getOperand(2).getReg(); in legalizeBufferStore() local
5989 .addUse(RSrc) // rsrc in legalizeBufferStore()
6006 static void buildBufferLoad(unsigned Opc, Register LoadDstReg, Register RSrc, in buildBufferLoad() argument
6013 .addUse(RSrc) // rsrc in buildBufferLoad()
6052 Register RSrc = MI.getOperand(2 + OpOffset).getReg(); in legalizeBufferLoad() local
6143 buildBufferLoad(Opc, LoadDstReg, RSrc, VIndex, VOffset, SOffset, ImmOffset, in legalizeBufferLoad()
6163 buildBufferLoad(Opc, LoadDstReg, RSrc, VIndex, VOffset, SOffset, ImmOffset, in legalizeBufferLoad()
6170 buildBufferLoad(Opc, LoadDstReg, RSrc, VIndex, VOffset, SOffset, ImmOffset, in legalizeBufferLoad()
6180 buildBufferLoad(Opc, Dst, RSrc, VIndex, VOffset, SOffset, ImmOffset, Format, in legalizeBufferLoad()
6301 Register RSrc = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferAtomic() local
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H A DAMDGPURegisterBankInfo.cpp1412 Register RSrc = MI.getOperand(1).getReg(); in applyMappingSBufferLoad() local
1435 .addUse(RSrc) // rsrc in applyMappingSBufferLoad()
1456 OpsToWaterfall.insert(RSrc); in applyMappingSBufferLoad()
H A DAMDGPUInstructionSelector.cpp6039 Register RSrc = MRI.createVirtualRegister(&AMDGPU::SGPR_128RegClass); in buildRSRC() local
6067 .addDef(RSrc) in buildRSRC()
6073 return RSrc; in buildRSRC()
H A DSIInstrInfo.cpp441 const MachineOperand *RSrc = getNamedOperand(LdSt, AMDGPU::OpName::srsrc); in getMemOperandsWithOffsetWidth() local
442 if (!RSrc) // e.g. BUFFER_WBINVL1_VOL in getMemOperandsWithOffsetWidth()
444 BaseOps.push_back(RSrc); in getMemOperandsWithOffsetWidth()