Searched refs:RS2 (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSplitDouble.cpp | 918 unsigned RS2 = getRegState(Op2); in splitAslOr() local
942 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR); in splitAslOr()
945 .addReg(Op2.getReg(), RS2, HiSR); in splitAslOr()
949 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR) in splitAslOr()
953 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR) in splitAslOr()
962 .addReg(Op2.getReg(), RS2, HiSR) in splitAslOr()
973 .addReg(Op2.getReg(), RS2, LoSR); in splitAslOr()
984 .addReg(Op2.getReg(), RS2, LoSR) in splitAslOr()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEAsmPrinter.cpp | 142 MCOperand &RS2, MCOperand &Imm, MCOperand &RD, in emitLEASLrri() argument
148 LEASLInst.addOperand(RS2); in emitLEASLrri()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcAsmPrinter.cpp | 154 MCOperand &RS1, MCOperand &RS2, MCOperand &RD, in EmitADD() argument
156 EmitBinary(OutStreamer, SP::ADDrr, RS1, RS2, RD, STI); in EmitADD()
|
| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | AsmMatcherEmitter.cpp | 1330 for (const RegisterSet &RS2 : RegisterSets) in buildRegisterClasses() local
1331 if (RS != RS2 && std::includes(RS2.begin(), RS2.end(), RS.begin(), in buildRegisterClasses()
1333 CI->SuperClasses.push_back(RegisterSetClasses[RS2]); in buildRegisterClasses()
|