Searched refs:RS2 (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSplitDouble.cpp | 912 unsigned RS2 = getRegState(Op2); in splitAslOr() local
936 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR); in splitAslOr()
939 .addReg(Op2.getReg(), RS2, HiSR); in splitAslOr()
943 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR) in splitAslOr()
947 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR) in splitAslOr()
956 .addReg(Op2.getReg(), RS2, HiSR) in splitAslOr()
967 .addReg(Op2.getReg(), RS2, LoSR); in splitAslOr()
978 .addReg(Op2.getReg(), RS2, LoSR) in splitAslOr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEAsmPrinter.cpp | 141 MCOperand &RS2, MCOperand &Imm, MCOperand &RD, in emitLEASLrri() argument
147 LEASLInst.addOperand(RS2); in emitLEASLrri()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcAsmPrinter.cpp | 158 MCOperand &RS1, MCOperand &RS2, MCOperand &RD, in EmitADD() argument
160 EmitBinary(OutStreamer, SP::ADDrr, RS1, RS2, RD, STI); in EmitADD()
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | AsmMatcherEmitter.cpp | 1331 for (const RegisterSet &RS2 : RegisterSets) in buildRegisterClasses() local
1332 if (RS != RS2 && llvm::includes(RS2, RS, LessRecordByID())) in buildRegisterClasses()
1333 CI->SuperClasses.push_back(RegisterSetClasses[RS2]); in buildRegisterClasses()
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