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Searched refs:RRX (Results 1 – 9 of 9) sorted by relevance

/freebsd/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
H A DARMUtils.h202 static inline uint32_t RRX(const uint32_t value, const uint32_t carry_in, in RRX() function
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.h106 RRX, // V = RRX X, Flag -> srl X, 1 + shift in carry flag. enumerator
H A DARMScheduleM7.td332 // Treat pure shift operations (except for RRX) as if they used the EX1
H A DARMScheduleA57.td218 // (ASR, LSL, LSR, ROR, RRX)=MOVsi, MVN
226 "(t2|t)RORri", "(t2)?RRX", "t2MOV", "tROR")>;
H A DARMScheduleR52.td338 (instregex "t2LDC", "RBIT", "REV", "REV16", "REVSH", "RRX")>;
H A DARMScheduleSwift.td154 // ASR,LSL,ROR,RRX
H A DARMInstrInfo.td196 def ARMrrx : SDNode<"ARMISD::RRX" , SDTIntUnaryOp, [SDNPInGlue ]>;
3731 def RRX: PseudoInst<(outs GPR:$Rd), (ins GPR:$Rm), IIC_iMOVsi,
6394 // LSR, ROR, and RRX instructions.
H A DARMExpandPseudoInsts.cpp2562 case ARM::RRX: { in ExpandMI()
H A DARMISelLowering.cpp1736 MAKE_CASE(ARMISD::RRX) in getTargetNodeName()
6774 Lo = DAG.getNode(ARMISD::RRX, dl, MVT::i32, Lo, Hi.getValue(1)); in Expand64BitShift()