Searched refs:RRX (Results 1 – 9 of 9) sorted by relevance
/freebsd/contrib/llvm-project/lldb/source/Plugins/Process/Utility/ |
H A D | ARMUtils.h | 202 static inline uint32_t RRX(const uint32_t value, const uint32_t carry_in, in RRX() function
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 106 RRX, // V = RRX X, Flag -> srl X, 1 + shift in carry flag. enumerator
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H A D | ARMScheduleM7.td | 332 // Treat pure shift operations (except for RRX) as if they used the EX1
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H A D | ARMScheduleA57.td | 218 // (ASR, LSL, LSR, ROR, RRX)=MOVsi, MVN 226 "(t2|t)RORri", "(t2)?RRX", "t2MOV", "tROR")>;
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H A D | ARMScheduleR52.td | 338 (instregex "t2LDC", "RBIT", "REV", "REV16", "REVSH", "RRX")>;
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H A D | ARMScheduleSwift.td | 154 // ASR,LSL,ROR,RRX
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H A D | ARMInstrInfo.td | 196 def ARMrrx : SDNode<"ARMISD::RRX" , SDTIntUnaryOp, [SDNPInGlue ]>; 3731 def RRX: PseudoInst<(outs GPR:$Rd), (ins GPR:$Rm), IIC_iMOVsi, 6394 // LSR, ROR, and RRX instructions.
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H A D | ARMExpandPseudoInsts.cpp | 2562 case ARM::RRX: { in ExpandMI()
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H A D | ARMISelLowering.cpp | 1736 MAKE_CASE(ARMISD::RRX) in getTargetNodeName() 6774 Lo = DAG.getNode(ARMISD::RRX, dl, MVT::i32, Lo, Hi.getValue(1)); in Expand64BitShift()
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