| /freebsd/contrib/bearssl/src/hash/ |
| H A D | sha1.c | 32 #define ROTL(x, n) (((x) << (n)) | ((x) >> (32 - (n)))) macro
60 m[i] = ROTL(x, 1); in br_sha1_round()
64 e += ROTL(a, 5) + F(b, c, d) + K1 + m[i + 0]; b = ROTL(b, 30); in br_sha1_round()
65 d += ROTL(e, 5) + F(a, b, c) + K1 + m[i + 1]; a = ROTL(a, 30); in br_sha1_round()
66 c += ROTL(d, 5) + F(e, a, b) + K1 + m[i + 2]; e = ROTL(e, 30); in br_sha1_round()
67 b += ROTL(c, 5) + F(d, e, a) + K1 + m[i + 3]; d = ROTL(d, 30); in br_sha1_round()
68 a += ROTL(b, 5) + F(c, d, e) + K1 + m[i + 4]; c = ROTL(c, 30); in br_sha1_round()
71 e += ROTL(a, 5) + G(b, c, d) + K2 + m[i + 0]; b = ROTL(b, 30); in br_sha1_round()
72 d += ROTL(e, 5) + G(a, b, c) + K2 + m[i + 1]; a = ROTL(a, 30); in br_sha1_round()
73 c += ROTL(d, 5) + G(e, a, b) + K2 + m[i + 2]; e = ROTL(e, 30); in br_sha1_round()
[all …]
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| H A D | md5.c | 32 #define ROTL(x, n) (((x) << (n)) | ((x) >> (32 - (n)))) macro
87 a = b + ROTL(a + F(b, c, d) + m[i + 0] + K[i + 0], 7); in br_md5_round()
88 d = a + ROTL(d + F(a, b, c) + m[i + 1] + K[i + 1], 12); in br_md5_round()
89 c = d + ROTL(c + F(d, a, b) + m[i + 2] + K[i + 2], 17); in br_md5_round()
90 b = c + ROTL(b + F(c, d, a) + m[i + 3] + K[i + 3], 22); in br_md5_round()
93 a = b + ROTL(a + G(b, c, d) + m[MP[i - 16]] + K[i + 0], 5); in br_md5_round()
94 d = a + ROTL(d + G(a, b, c) + m[MP[i - 15]] + K[i + 1], 9); in br_md5_round()
95 c = d + ROTL(c + G(d, a, b) + m[MP[i - 14]] + K[i + 2], 14); in br_md5_round()
96 b = c + ROTL(b + G(c, d, a) + m[MP[i - 13]] + K[i + 3], 20); in br_md5_round()
99 a = b + ROTL(a + H(b, c, d) + m[MP[i - 16]] + K[i + 0], 4); in br_md5_round()
[all …]
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| /freebsd/contrib/llvm-project/third-party/siphash/include/siphash/ |
| H A D | SipHash.h | 21 #define ROTL(x, b) (uint64_t)(((x) << (b)) | ((x) >> (64 - (b)))) macro
42 v1 = ROTL(v1, 13); \
44 v0 = ROTL(v0, 32); \
46 v3 = ROTL(v3, 16); \
49 v3 = ROTL(v3, 21); \
52 v1 = ROTL(v1, 17); \
54 v2 = ROTL(v2, 32); \
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| /freebsd/contrib/unbound/util/ |
| H A D | siphash.c | 38 #define ROTL(x, b) (uint64_t)(((x) << (b)) | ((x) >> (64 - (b)))) macro
59 v1 = ROTL(v1, 13); \
61 v0 = ROTL(v0, 32); \
63 v3 = ROTL(v3, 16); \
66 v3 = ROTL(v3, 21); \
69 v1 = ROTL(v1, 17); \
71 v2 = ROTL(v2, 32); \
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| /freebsd/crypto/openssl/crypto/siphash/ |
| H A D | siphash.c | 32 #define ROTL(x, b) (uint64_t)(((x) << (b)) | ((x) >> (64 - (b)))) macro
50 v1 = ROTL(v1, 13); \
52 v0 = ROTL(v0, 32); \
54 v3 = ROTL(v3, 16); \
57 v3 = ROTL(v3, 21); \
60 v1 = ROTL(v1, 17); \
62 v2 = ROTL(v2, 32); \
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| /freebsd/crypto/openssl/crypto/cast/ |
| H A D | cast_local.h | 90 #define ROTL(a, n) (_lrotl(a, n)) macro
92 #define ROTL(a, n) ((((a) << (n)) & 0xffffffffL) | ((a) >> ((32 - (n)) & 31))) macro
108 t = ROTL(t, i); \
132 w = ROTL(w, i); \
152 t = ROTL(t, (key[n * 2 + 1])); \
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| /freebsd/crypto/krb5/src/lib/crypto/builtin/sha1/ |
| H A D | shs.c | 39 #define ROTL(n,X) ((((X) << (n)) & 0xffffffff) | ((X) >> (32 - n))) macro
56 #define expand(W,i) ( W[ i & 15 ] = ROTL( 1, ( W[ i & 15 ] ^ W[ (i - 14) & 15 ] ^ \
77 ( e += ROTL( 5, a ) + f( b, c, d ) + k + data, \
78 e &= 0xffffffff, b = ROTL( 30, b ) )
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| /freebsd/crypto/openssl/crypto/bn/asm/ |
| H A D | ppc.pl | 132 $ROTL= "rotlwi"; # rotate left by immediate
156 $ROTL= "rotldi"; # rotate left by immediate
1727 $ROTL r3,r11,`$BITS/2` # rotate by $BITS/2 and store in r3
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 3636 { ISD::ROTL, MVT::v32i16, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
3637 { ISD::ROTL, MVT::v16i16, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
3638 { ISD::ROTL, MVT::v8i16, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
3729 { ISD::ROTL, MVT::v32i16, { 2, 8, 6, 8 } }, in getIntrinsicInstrCost()
3730 { ISD::ROTL, MVT::v16i16, { 2, 8, 6, 7 } }, in getIntrinsicInstrCost()
3731 { ISD::ROTL, MVT::v8i16, { 2, 7, 6, 7 } }, in getIntrinsicInstrCost()
3732 { ISD::ROTL, MVT::v64i8, { 5, 6, 11, 12 } }, in getIntrinsicInstrCost()
3733 { ISD::ROTL, MVT::v32i8, { 5, 15, 7, 10 } }, in getIntrinsicInstrCost()
3734 { ISD::ROTL, MVT::v16i8, { 5, 15, 7, 10 } }, in getIntrinsicInstrCost()
3797 { ISD::ROTL, MVT::v8i64, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
[all …]
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| H A D | X86InstrShiftRotate.td | 530 // Convert a ROTL shamt to a ROTR shamt on 32-bit integer.
535 // Convert a ROTL shamt to a ROTR shamt on 64-bit integer.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 97 setOperationAction(ISD::ROTL, MVT::i8, Custom); in AVRTargetLowering()
98 setOperationAction(ISD::ROTL, MVT::i16, Expand); in AVRTargetLowering()
280 case ISD::ROTL: { in LowerShifts()
307 case ISD::ROTL: in LowerShifts()
360 } else if (Op.getOpcode() == ISD::ROTL && ShiftAmount == 3) { in LowerShifts()
370 } else if (Op.getOpcode() == ISD::ROTL && ShiftAmount == 7) { in LowerShifts()
378 } else if ((Op.getOpcode() == ISD::ROTR || Op.getOpcode() == ISD::ROTL) && in LowerShifts()
929 case ISD::ROTL: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 759 ROTL, enumerator
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| H A D | SDPatternMatch.h | 883 return BinaryOpc_match<LHS, RHS>(ISD::ROTL, L, R);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyInstrInteger.td | 69 defm ROTL : BinaryInt<rotl, "rotl", 0x77, 0x89>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 80 setOperationAction(ISD::ROTL, MVT::i8, Expand); in MSP430TargetLowering()
82 setOperationAction(ISD::ROTL, MVT::i16, Expand); in MSP430TargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1669 ISD::SDIVREM, ISD::UDIVREM, ISD::ROTL, ISD::ROTR, in HexagonTargetLowering()
1719 ISD::AND, ISD::OR, ISD::XOR, ISD::ROTL, ISD::ROTR, in HexagonTargetLowering()
1903 setOperationAction(ISD::ROTL, MVT::i32, Legal); in HexagonTargetLowering()
1904 setOperationAction(ISD::ROTL, MVT::i64, Legal); in HexagonTargetLowering()
3403 case ISD::ROTL: return LowerROTL(Op, DAG); in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 860 case ISD::ROTL: { in expandRxSBG()
1650 case ISD::ROTL: in Select()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 298 case ISD::ROTL: return "rotl"; in getOperationName()
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| H A D | LegalizeVectorOps.cpp | 378 case ISD::ROTL: in LegalizeOp()
1128 case ISD::ROTL: in Expand()
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| H A D | DAGCombiner.cpp | 1947 case ISD::ROTL: return visitRotate(N); in visit()
7691 for (unsigned Opc : {ISD::ROTL, ISD::ROTR}) in visitAND()
8138 if (TLI.isOperationLegalOrCustom(ISD::ROTL, VT)) in MatchBSwapHWord()
8139 return DAG.getNode(ISD::ROTL, DL, VT, BSwap, ShAmt); in MatchBSwapHWord()
8860 bool HasROTL = hasOperation(ISD::ROTL, VT); in MatchRotate()
8870 HasROTL |= TLI.getOperationAction(ISD::ROTL, VT) == TargetLowering::Custom; in MatchRotate()
8999 SDValue RotX = DAG.getNode(ISD::ROTL, DL, VT, X, LHSShiftAmt); in MatchRotate()
9004 SDValue RotX = DAG.getNode(ISD::ROTL, DL, VT, X, LHSShiftAmt); in MatchRotate()
9026 Res = DAG.getNode(UseROTL ? ISD::ROTL : ISD::ROTR, DL, VT, LHSShiftArg, in MatchRotate()
9065 ISD::ROTL, ISD::ROTR, DL)) in MatchRotate()
[all …]
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| H A D | LegalizeIntegerTypes.cpp | 330 case ISD::ROTL: in PromoteIntegerResult()
2027 case ISD::ROTL: in PromoteIntegerOperand()
3117 case ISD::ROTL: in ExpandIntegerResult()
5420 unsigned Opcode = N->getOpcode() == ISD::ROTL ? ISD::FSHL : ISD::FSHR; in ExpandIntRes_Rotate()
5521 case ISD::ROTL: in ExpandIntegerOperand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 119 setOperationAction(ISD::ROTL, VT, Expand); in BPFTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 644 ISD::ROTL, ISD::ROTR, ISD::SADDO, ISD::SADDO_CARRY, in NVPTXTargetLowering()
688 setOperationAction({ISD::ROTL, ISD::ROTR}, in NVPTXTargetLowering()
694 setOperationAction({ISD::ROTL, ISD::ROTR, ISD::FSHL, ISD::FSHR}, MVT::i64, in NVPTXTargetLowering()
2809 unsigned Opcode = Op->getOpcode() == ISD::ROTL ? ISD::FSHL : ISD::FSHR; in lowerROT()
2940 case ISD::ROTL: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 682 } else if (Opcode == ISD::ROTL) { in isRotateAndMask()
1623 case ISD::ROTL: in getValueBits()
4102 case ISD::ROTL: in tryBitPermutation()
4963 if (isRunOfOnes(Imm, MB, ME) && Val.getOpcode() != ISD::ROTL) { in tryAsSingleRLWINM()
5121 if (Val.getOpcode() != ISD::ROTL) in tryAsSingleRLDCL()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 118 setOperationAction(ISD::ROTL, MVT::i32, Expand); in LanaiTargetLowering()
|