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Searched refs:ROD (Results 1 – 5 of 5) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVBaseInfo.h456 ROD = 3, enumerator
470 case RISCVVXRndMode::ROD: in roundingModeToString()
480 .Case("rod", RISCVVXRndMode::ROD) in stringToRoundingMode()
491 case RISCVVXRndMode::ROD: in isValidRoundingMode()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsDSPInstrInfo.td267 InstrItinClass itin, RegisterOperand ROD,
269 dag OutOperandList = (outs ROD:$rd);
272 list<dag> Pattern = [(set ROD:$rd, (OpNode ROS:$rs, ROT:$rt))];
278 InstrItinClass itin, RegisterOperand ROD,
279 RegisterOperand ROS = ROD> {
280 dag OutOperandList = (outs ROD:$rd);
283 list<dag> Pattern = [(set ROD:$rd, (OpNode ROS:$rs))];
300 InstrItinClass itin, RegisterOperand ROD,
302 dag OutOperandList = (outs ROD:$rd);
305 list<dag> Pattern = [(set ROD:$rd, (OpNode ROS:$rs, ROT:$rt))];
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H A DMicroMipsDSPInstrInfo.td180 InstrItinClass itin, RegisterOperand ROD,
181 RegisterOperand ROS = ROD> {
182 dag OutOperandList = (outs ROD:$rt);
185 list<dag> Pattern = [(set ROD:$rt, (OpNode ROS:$rs))];
H A DMipsMSAInstrInfo.td1145 RegisterOperand ROD, RegisterOperand ROWS,
1147 dag OutOperandList = (outs ROD:$rd);
1150 list<dag> Pattern = [(set ROD:$rd, (OpNode (VecTy ROWS:$ws), Imm:$n))];
/freebsd/crypto/heimdal/lib/wind/
H A DNormalizationTest.txt5492 B863;B863;1105 1169 11AE;B863;1105 1169 11AE; # (롣; 롣; 롣; 롣; 롣; ) HANGUL SYLLABLE ROD