Searched refs:RISCVOpcode (Results 1 – 6 of 6) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrFormats.td | 117 class RISCVOpcode<string name, bits<7> val> { 122 let FilterClass = "RISCVOpcode"; 133 def OPC_LOAD : RISCVOpcode<"LOAD", 0b0000011>; 134 def OPC_LOAD_FP : RISCVOpcode<"LOAD_FP", 0b0000111>; 135 def OPC_CUSTOM_0 : RISCVOpcode<"CUSTOM_0", 0b0001011>; 136 def OPC_MISC_MEM : RISCVOpcode<"MISC_MEM", 0b0001111>; 137 def OPC_OP_IMM : RISCVOpcode<"OP_IMM", 0b0010011>; 138 def OPC_AUIPC : RISCVOpcode<"AUIPC", 0b0010111>; 139 def OPC_OP_IMM_32 : RISCVOpcode<"OP_IMM_32", 0b0011011>; 140 def OPC_STORE : RISCVOpcode<"STORE", 0b0100011>; [all …]
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H A D | RISCVInstrInfoZimop.td | 14 class RVInstIMopr<bits<7> imm7, bits<5> imm5, bits<3> funct3, RISCVOpcode opcode, 25 class RVInstRMoprr<bits<4> imm4, bits<3> imm3, bits<3> funct3, RISCVOpcode opcode, 45 RISCVOpcode opcode, string opcodestr> 51 RISCVOpcode opcode, string opcodestr>
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H A D | RISCVInstrInfoZb.td | 253 RISCVOpcode opcode, string opcodestr> 258 class RVBShift_ri<bits<5> imm11_7, bits<3> funct3, RISCVOpcode opcode, 265 class RVBShiftW_ri<bits<7> imm11_5, bits<3> funct3, RISCVOpcode opcode,
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H A D | RISCVInstrInfoF.td | 177 class FPFMA_rrr_frm<RISCVOpcode opcode, bits<2> funct2, string opcodestr, 183 multiclass FPFMA_rrr_frm_m<RISCVOpcode opcode, bits<2> funct2,
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H A D | RISCVInstrInfoXCV.td | 281 RISCVOpcode opcode, dag outs, 290 class CVInstSIMDRI<bits<5> funct5, bit F, bits<3> funct3, RISCVOpcode opcode,
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
H A D | RISCVBaseInfo.h | 436 struct RISCVOpcode { struct
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