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/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/JITLink/
H A DMachO_arm64.cpp73 getRelocationKind(const MachO::relocation_info &RI) { in getRelocationKind() argument
74 switch (RI.r_type) { in getRelocationKind()
76 if (!RI.r_pcrel) { in getRelocationKind()
77 if (RI.r_length == 3) in getRelocationKind()
78 return RI.r_extern ? MachOPointer64 : MachOPointer64Anon; in getRelocationKind()
79 else if (RI.r_length == 2) in getRelocationKind()
87 if (!RI.r_pcrel && RI.r_extern) { in getRelocationKind()
88 if (RI.r_length == 2) in getRelocationKind()
90 else if (RI.r_length == 3) in getRelocationKind()
95 if (RI.r_pcrel && RI.r_extern && RI.r_length == 2) in getRelocationKind()
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H A DMachO_x86_64.cpp60 getRelocKind(const MachO::relocation_info &RI) { in getRelocKind() argument
61 switch (RI.r_type) { in getRelocKind()
63 if (!RI.r_pcrel) { in getRelocKind()
64 if (RI.r_length == 3) in getRelocKind()
65 return RI.r_extern ? MachOPointer64 : MachOPointer64Anon; in getRelocKind()
66 else if (RI.r_extern && RI.r_length == 2) in getRelocKind()
71 if (RI.r_pcrel && RI.r_length == 2) in getRelocKind()
72 return RI.r_extern ? MachOPCRel32 : MachOPCRel32Anon; in getRelocKind()
75 if (RI.r_pcrel && RI.r_extern && RI.r_length == 2) in getRelocKind()
79 if (RI.r_pcrel && RI.r_extern && RI.r_length == 2) in getRelocKind()
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H A DMachOLinkGraphBuilder.h172 MachO::relocation_info RI; in getRelocationInfo() local
173 RI.r_address = ARI.r_word0; in getRelocationInfo()
174 RI.r_symbolnum = ARI.r_word1 & 0xffffff; in getRelocationInfo()
175 RI.r_pcrel = (ARI.r_word1 >> 24) & 1; in getRelocationInfo()
176 RI.r_length = (ARI.r_word1 >> 25) & 3; in getRelocationInfo()
177 RI.r_extern = (ARI.r_word1 >> 27) & 1; in getRelocationInfo()
178 RI.r_type = (ARI.r_word1 >> 28); in getRelocationInfo()
179 return RI; in getRelocationInfo()
/freebsd/contrib/llvm-project/llvm/tools/llvm-diff/lib/
H A DDifferenceEngine.cpp305 BasicBlock::const_iterator RI = R->begin(); in diff() local
308 assert(LI != LE && RI != R->end()); in diff()
309 const Instruction *LeftI = &*LI, *RightI = &*RI; in diff()
328 ++RI; in diff()
334 for (LI = L->begin(), RI = R->begin(); LI != LE; ++LI, ++RI) in diff()
335 unify(&*LI, &*RI); in diff()
340 BasicBlock::const_iterator RI);
390 const PHINode &RI = cast<PHINode>(*R); in diff() local
393 if (LI.getType() != RI.getType()) { in diff()
394 if (!LI.getType()->isPointerTy() || !RI.getType()->isPointerTy()) { in diff()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineRegionInfo.h64 MachineRegionInfo *RI, MachineDominatorTree *DT,
86 MachineRegionInfo RI;
94 MachineRegionInfo &getRegionInfo() { return RI; }
96 const MachineRegionInfo &getRegionInfo() const { return RI; }
142 static NodeRef getEntryNode(MachineRegionInfo *RI) {
144 RI->getTopLevelRegion());
147 static nodes_iterator nodes_begin(MachineRegionInfo *RI) {
148 return nodes_iterator::begin(getEntryNode(RI));
151 static nodes_iterator nodes_end(MachineRegionInfo *RI) {
152 return nodes_iterator::end(getEntryNode(RI));
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/freebsd/contrib/llvm-project/llvm/lib/Target/DirectX/
H A DDXILPrettyPrinter.cpp50 static StringRef getFormatName(const dxil::ResourceTypeInfo &RI) { in getFormatName() argument
51 if (RI.isTyped()) { in getFormatName()
52 switch (RI.getTyped().ElementTy) { in getFormatName()
93 } else if (RI.isStruct()) in getFormatName()
95 else if (RI.isCBuffer() || RI.isSampler()) in getFormatName()
142 FormatResourceDimension(const dxil::ResourceTypeInfo &RI, bool HasCounter) in FormatResourceDimension()
143 : llvm::FormatAdapter<const dxil::ResourceTypeInfo &>(RI), in FormatResourceDimension()
183 explicit FormatBindingID(const dxil::ResourceInfo &RI, in FormatBindingID()
185 : llvm::FormatAdapter<const dxil::ResourceInfo &>(RI), in FormatBindingID()
197 explicit FormatBindingLocation(const dxil::ResourceInfo &RI, in FormatBindingLocation()
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H A DDXILTranslateMetadata.cpp80 for (ResourceInfo &RI : DRM) in emitResourceMetadata()
81 if (!RI.hasSymbol()) in emitResourceMetadata()
82 RI.createSymbol(M, in emitResourceMetadata()
83 DRTM[RI.getHandleTy()].createElementStruct(RI.getName())); in emitResourceMetadata()
86 for (const ResourceInfo &RI : DRM.srvs()) in emitResourceMetadata() local
87 SRVs.push_back(RI.getAsMetadata(M, DRTM[RI.getHandleTy()])); in emitResourceMetadata()
88 for (const ResourceInfo &RI : DRM.uavs()) in emitResourceMetadata() local
89 UAVs.push_back(RI.getAsMetadata(M, DRTM[RI.getHandleTy()])); in emitResourceMetadata()
90 for (const ResourceInfo &RI : DRM.cbuffers()) in emitResourceMetadata() local
91 CBufs.push_back(RI.getAsMetadata(M, DRTM[RI.getHandleTy()])); in emitResourceMetadata()
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H A DDXContainerGlobals.cpp201 for (const dxil::ResourceInfo &RI : DRM.cbuffers()) { in addResourcesForPSV() local
202 const dxil::ResourceInfo::ResourceBinding &Binding = RI.getBinding(); in addResourcesForPSV()
206 for (const dxil::ResourceInfo &RI : DRM.samplers()) { in addResourcesForPSV() local
207 const dxil::ResourceInfo::ResourceBinding &Binding = RI.getBinding(); in addResourcesForPSV()
212 for (const dxil::ResourceInfo &RI : DRM.srvs()) { in addResourcesForPSV() local
213 const dxil::ResourceInfo::ResourceBinding &Binding = RI.getBinding(); in addResourcesForPSV()
215 dxil::ResourceTypeInfo &TypeInfo = DRTM[RI.getHandleTy()]; in addResourcesForPSV()
227 for (const dxil::ResourceInfo &RI : DRM.uavs()) { in addResourcesForPSV() local
228 const dxil::ResourceInfo::ResourceBinding &Binding = RI.getBinding(); in addResourcesForPSV()
230 dxil::ResourceTypeInfo &TypeInfo = DRTM[RI.getHandleTy()]; in addResourcesForPSV()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/
H A DControlHeightReduction.cpp147 CHRScope(RegInfo RI) : BranchInsertPoint(nullptr) { in CHRScope() argument
148 assert(RI.R && "Null RegionIn"); in CHRScope()
149 RegInfos.push_back(RI); in CHRScope()
200 for (RegInfo &RI : RegInfos) in addSub()
201 if (RI.R == SubIn->getParentRegion()) { in addSub()
217 RegInfos, [&Boundary](const RegInfo &RI) { return Boundary == RI.R; }); in split() argument
222 for (const RegInfo &RI : TailRegInfos) in split() local
223 TailRegionSet.insert(RI.R); in split()
234 [&Parent](const RegInfo &RI) { return Parent == RI.R; }) && in split() argument
249 for (const RegInfo &RI : RegInfos) in contains() local
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/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DRegionPrinter.cpp107 for (const auto &RI : R) in printRegionCluster() local
108 printRegionCluster(*RI, GW, depth + 1); in printRegionCluster()
110 const RegionInfo &RI = *static_cast<const RegionInfo*>(R.getRegionInfo()); in printRegionCluster() local
113 if (RI.getRegionFor(BB) == &R) in printRegionCluster()
115 << static_cast<const void*>(RI.getTopLevelRegion()->getBBNode(BB)) in printRegionCluster()
213 static void viewRegionInfo(RegionInfo *RI, bool ShortNames) { in viewRegionInfo() argument
214 assert(RI && "Argument must be non-null"); in viewRegionInfo()
216 llvm::Function *F = RI->getTopLevelRegion()->getEntry()->getParent(); in viewRegionInfo()
217 std::string GraphName = DOTGraphTraits<RegionInfo *>::getGraphName(RI); in viewRegionInfo()
219 llvm::ViewGraph(RI, "reg", ShortNames, in viewRegionInfo()
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H A DRegionInfo.cpp64 RegionInfo* RI, in Region() argument
66 RegionBase<RegionTraits<Function>>(Entry, Exit, RI, DT, Parent) { in Region()
130 RI.recalculate(F, DT, PDT, DF); in runOnFunction()
135 RI.releaseMemory(); in releaseMemory()
139 RI.verifyAnalysis(); in verifyAnalysis()
150 RI.print(OS); in print()
155 RI.dump(); in dump()
188 RegionInfo RI; in run() local
193 RI.recalculate(F, DT, PDT, DF); in run()
194 return RI; in run()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DDwarfEHPrepare.cpp68 Value *GetExceptionObject(ResumeInst *RI);
92 Value *DwarfEHPrepare::GetExceptionObject(ResumeInst *RI) { in GetExceptionObject() argument
93 Value *V = RI->getOperand(0); in GetExceptionObject()
113 ExnObj = ExtractValueInst::Create(RI->getOperand(0), 0, "exn.obj", in GetExceptionObject()
114 RI->getIterator()); in GetExceptionObject()
116 RI->eraseFromParent(); in GetExceptionObject()
137 for (auto *RI : Resumes) { in pruneUnreachableResumes() local
139 if (isPotentiallyReachable(LP, RI, nullptr, &DTU->getDomTree())) { in pruneUnreachableResumes()
156 ResumeInst *RI = Resumes[I]; in pruneUnreachableResumes() local
158 Resumes[ResumesLeft++] = RI; in pruneUnreachableResumes()
[all …]
H A DMachineRegionInfo.cpp38 MachineRegionInfo* RI, in MachineRegion() argument
40 RegionBase<RegionTraits<MachineFunction>>(Entry, Exit, RI, DT, Parent) {} in MachineRegion()
92 RI.recalculate(F, DT, PDT, DF); in runOnMachineFunction()
94 LLVM_DEBUG(RI.dump()); in runOnMachineFunction()
100 RI.releaseMemory(); in releaseMemory()
108 RI.verifyAnalysis(); in verifyAnalysis()
120 RI.print(OS); in print()
125 RI.dump(); in dump()
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiDelaySlotFiller.cpp105 MachineBasicBlock::reverse_instr_iterator RI = ++I.getReverse(); in runOnMachineBasicBlock() local
106 assert(RI->getOpcode() == Lanai::LDW_RI && RI->getOperand(0).isReg() && in runOnMachineBasicBlock()
107 RI->getOperand(0).getReg() == Lanai::FP && in runOnMachineBasicBlock()
108 RI->getOperand(1).isReg() && in runOnMachineBasicBlock()
109 RI->getOperand(1).getReg() == Lanai::FP && in runOnMachineBasicBlock()
110 RI->getOperand(2).isImm() && RI->getOperand(2).getImm() == -8); in runOnMachineBasicBlock()
111 ++RI; in runOnMachineBasicBlock()
112 assert(RI->getOpcode() == Lanai::ADD_I_LO && in runOnMachineBasicBlock()
113 RI->getOperand(0).isReg() && in runOnMachineBasicBlock()
114 RI->getOperand(0).getReg() == Lanai::SP && in runOnMachineBasicBlock()
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/freebsd/contrib/llvm-project/llvm/lib/MC/
H A DMCInstrDesc.cpp21 const MCRegisterInfo &RI) const { in mayAffectControlFlow()
24 MCRegister PC = RI.getProgramCounter(); in mayAffectControlFlow()
27 if (hasDefOfPhysReg(MI, PC, RI)) in mayAffectControlFlow()
41 const MCRegisterInfo &RI) const { in hasDefOfPhysReg()
44 RI.isSubRegisterEq(Reg, MI.getOperand(i).getReg())) in hasDefOfPhysReg()
49 RI.isSubRegisterEq(Reg, MI.getOperand(i).getReg())) in hasDefOfPhysReg()
51 return hasImplicitDefOfPhysReg(Reg, &RI); in hasDefOfPhysReg()
H A DMCRegisterInfo.cpp31 MCRegUnitIterator RI; member in __anon1f4922b00111::MCRegAliasIteratorImpl
40 for (RI = MCRegUnitIterator(Reg, MCRI); RI.isValid(); ++RI) { in MCRegAliasIteratorImpl()
41 for (RRI = MCRegUnitRootIterator(*RI, MCRI); RRI.isValid(); ++RRI) { in MCRegAliasIteratorImpl()
50 bool isValid() const { return RI.isValid(); } in isValid()
69 ++RI; in advance()
70 if (RI.isValid()) { in advance()
71 RRI = MCRegUnitRootIterator(*RI, MCRI); in advance()
/freebsd/contrib/llvm-project/llvm/include/llvm-c/
H A DObject.h186 LLVM_C_ABI void LLVMDisposeRelocationIterator(LLVMRelocationIteratorRef RI);
188 LLVMSectionIteratorRef Section, LLVMRelocationIteratorRef RI);
189 LLVM_C_ABI void LLVMMoveToNextRelocation(LLVMRelocationIteratorRef RI);
197 LLVM_C_ABI uint64_t LLVMGetRelocationOffset(LLVMRelocationIteratorRef RI);
199 LLVMGetRelocationSymbol(LLVMRelocationIteratorRef RI);
200 LLVM_C_ABI uint64_t LLVMGetRelocationType(LLVMRelocationIteratorRef RI);
203 LLVM_C_ABI const char *LLVMGetRelocationTypeName(LLVMRelocationIteratorRef RI);
205 LLVMGetRelocationValueString(LLVMRelocationIteratorRef RI);
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCChecker.cpp71 HexagonMCInstrInfo::isPredReg(RI, R)) { in initReg()
82 for (MCRegAliasIterator SRI(R, &RI, RI.subregs(R).empty()); SRI.isValid(); in initReg()
84 if (RI.subregs(*SRI).empty()) in initReg()
126 else if (HexagonMCInstrInfo::isPredReg(RI, R) && in init()
148 for (MCRegAliasIterator SRI(R, &RI, RI.subregs(R).empty()); SRI.isValid(); in init()
150 if (!RI.subregs(*SRI).empty()) in init()
170 HexagonMCInstrInfo::isPredReg(RI, *SRI)) in init()
192 if (HexagonMCInstrInfo::isPredReg(RI, P)) in init()
200 : Context(Context), MCB(mcb), RI(ri), MCII(MCII), STI(STI), in HexagonMCChecker()
208 : Context(Other.Context), MCB(Other.MCB), RI(Other.RI), MCII(Other.MCII), in HexagonMCChecker()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURewriteOutArguments.cpp215 if (ReturnInst *RI = dyn_cast<ReturnInst>(&BB.back())) in runOnFunction() local
216 Returns.push_back(RI); in runOnFunction()
252 for (ReturnInst *RI : Returns) { in runOnFunction()
253 BasicBlock *BB = RI->getParent(); in runOnFunction()
256 MemoryLocation::getBeforeOrAfter(OutArg), true, BB->end(), BB, RI); in runOnFunction()
263 ReplaceableStores.emplace_back(RI, SI); in runOnFunction()
333 ReturnInst *RI = Replacement.first; in runOnFunction() local
334 IRBuilder<> B(RI); in runOnFunction()
335 B.SetCurrentDebugLocation(RI->getDebugLoc()); in runOnFunction()
340 Value *RetVal = RI->getReturnValue(); in runOnFunction()
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H A DSIInstrInfo.cpp65 RI(ST), ST(ST) { in SIInstrInfo()
207 RI.isSGPRClass(MRI.getRegClass(Op.getReg()))) { in isSafeToSink()
659 const SIRegisterInfo &RI = TII.getRegisterInfo(); in indirectCopyToAGPR() local
669 if (!Def->modifiesRegister(SrcReg, &RI)) in indirectCopyToAGPR()
684 if (I->modifiesRegister(DefOp.getReg(), &RI)) in indirectCopyToAGPR()
713 unsigned MaxVGPRs = RI.getRegPressureLimit(&AMDGPU::VGPR_32RegClass, in indirectCopyToAGPR()
730 if (!Tmp2 || RI.getHWRegIndex(Tmp2) >= MaxVGPRs) in indirectCopyToAGPR()
763 const SIRegisterInfo &RI = TII.getRegisterInfo(); in expandSGPRCopy() local
764 ArrayRef<int16_t> BaseIndices = RI.getRegSplitParts(RC, 4); in expandSGPRCopy()
770 Register DestSubReg = RI.getSubReg(DestReg, SubIdx); in expandSGPRCopy()
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/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DRegionIterator.h332 static NodeRef getEntryNode(RegionInfo *RI) {
333 return GraphTraits<FlatIt<Region*>>::getEntryNode(RI->getTopLevelRegion());
336 static nodes_iterator nodes_begin(RegionInfo* RI) {
337 return nodes_iterator::begin(getEntryNode(RI));
340 static nodes_iterator nodes_end(RegionInfo *RI) {
341 return nodes_iterator::end(getEntryNode(RI));
351 static NodeRef getEntryNode(RegionInfoPass *RI) {
352 return GraphTraits<RegionInfo*>::getEntryNode(&RI->getRegionInfo());
355 static nodes_iterator nodes_begin(RegionInfoPass* RI) {
356 return GraphTraits<RegionInfo*>::nodes_begin(&RI->getRegionInfo());
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DX86EVEX2VEXTablesEmitter.cpp
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp67 const MCRegisterInfo *RI) { in getHexagonRegisterPair() argument
69 unsigned Pair = *RI->superregs(Reg).begin(); in getHexagonRegisterPair()
267 const MCRegisterInfo *RI = OutStreamer->getContext().getRegisterInfo(); in HexagonProcessInstruction() local
377 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction()
382 Rt.setReg(getHexagonRegisterPair(Rt.getReg(), RI)); in HexagonProcessInstruction()
388 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction()
393 Rt.setReg(getHexagonRegisterPair(Rt.getReg(), RI)); in HexagonProcessInstruction()
400 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction()
405 Rt.setReg(getHexagonRegisterPair(Rt.getReg(), RI)); in HexagonProcessInstruction()
412 unsigned Reg = RI->getEncodingValue(Rs.getReg()); in HexagonProcessInstruction()
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/freebsd/contrib/llvm-project/llvm/include/llvm/SandboxIR/
H A DUtils.h35 if (auto *RI = dyn_cast<ReturnInst>(I)) { in getExpectedType() local
36 if (RI->getReturnValue() == nullptr) in getExpectedType()
37 return RI->getType(); in getExpectedType()
50 if (auto *RI = dyn_cast<ReturnInst>(I)) in getExpectedValue() local
51 return RI->getReturnValue(); in getExpectedValue()
/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/
H A DRuntimeDyldMachO.h61 const relocation_iterator &RI) const { in getRelocationEntry() argument
65 Obj.getRelocation(RI->getRawDataRefImpl()); in getRelocationEntry()
69 uint64_t Offset = RI->getOffset(); in getRelocationEntry()
94 const relocation_iterator &RI,
100 const relocation_iterator &RI,

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