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Searched refs:RHSLo (Results 1 – 5 of 5) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp1378 SDValue RHSLo, RHSHi; in SplitVecRes_BinOp()
1379 GetSplitVector(N->getOperand(1), RHSLo, RHSHi); in SplitVecRes_BinOp()
1385 Lo = DAG.getNode(Opcode, dl, LHSLo.getValueType(), LHSLo, RHSLo, Flags); in SplitVecRes_BinOp()
1401 {LHSLo, RHSLo, MaskLo, EVLLo}, Flags);
1447 SDValue LHSLo, LHSHi, RHSLo, RHSHi; in SplitVecRes_CMP()
1450 GetSplitVector(RHS, RHSLo, RHSHi); in SplitVecRes_CMP()
1453 std::tie(RHSLo, RHSHi) = DAG.SplitVector(RHS, dl); in SplitVecRes_CMP()
1457 Lo = DAG.getNode(N->getOpcode(), dl, SplitResVT, LHSLo, RHSLo); in SplitVecRes_FIX()
1464 SDValue RHSLo, RHSHi; in SplitVecRes_FIX()
1465 GetSplitVector(N->getOperand(1), RHSLo, RHSH in SplitVecRes_FIX()
1374 SDValue RHSLo, RHSHi; SplitVecRes_BinOp() local
1443 SDValue LHSLo, LHSHi, RHSLo, RHSHi; SplitVecRes_CMP() local
1460 SDValue RHSLo, RHSHi; SplitVecRes_FIX() local
1663 SDValue RHSLo, RHSHi; SplitVecRes_FPOp_MultiType() local
4205 SDValue RHSLo, RHSHi; SplitVecOp_FPOpDifferentTypes() local
4218 SDValue LHSLo, LHSHi, RHSLo, RHSHi; SplitVecOp_CMP() local
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H A DLegalizeIntegerTypes.cpp5324 SDValue LHSLo, LHSHi, RHSLo, RHSHi; in IntegerExpandSetCCOperands() local
5326 GetExpandedInteger(NewRHS, RHSLo, RHSHi); in IntegerExpandSetCCOperands()
5329 if (RHSLo == RHSHi && isAllOnesConstant(RHSLo)) { in IntegerExpandSetCCOperands()
5332 NewRHS = RHSLo; in IntegerExpandSetCCOperands()
5336 NewLHS = DAG.getNode(ISD::XOR, dl, LHSLo.getValueType(), LHSLo, RHSLo); in IntegerExpandSetCCOperands()
5377 TLI.isTypeLegal(RHSLo.getValueType())) in IntegerExpandSetCCOperands()
5379 RHSLo, LowCC, false, DagCombineInfo, dl); in IntegerExpandSetCCOperands()
5382 RHSLo, LowCC); in IntegerExpandSetCCOperands()
5435 std::swap(LHSLo, RHSLo); in IntegerExpandSetCCOperands()
5444 SDValue LowCmp = DAG.getNode(ISD::USUBO, dl, VTList, LHSLo, RHSLo); in IntegerExpandSetCCOperands()
[all …]
H A DLegalizeFloatTypes.cpp2117 SDValue LHSLo, LHSHi, RHSLo, RHSHi; in FloatExpandSetCCOperands() local
2119 GetExpandedFloat(NewRHS, RHSLo, RHSHi); in FloatExpandSetCCOperands()
2133 RHSLo, CCCode, OutputChain, IsSignaling); in FloatExpandSetCCOperands()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp601 auto *RHSLo = Builder.CreateShuffleVector(Arg1, LoMask); in simplifyX86pmadd() local
608 RHSLo = Builder.CreateCast(Instruction::CastOps::SExt, RHSLo, ResTy); in simplifyX86pmadd()
610 Value *Lo = Builder.CreateMul(LHSLo, RHSLo); in simplifyX86pmadd()
H A DX86ISelLowering.cpp28835 SDValue RHSLo, RHSHi; in LowerMULO() local
28836 std::tie(RHSLo, RHSHi) = splitVector(B, DAG, dl); in LowerMULO()
28844 SDValue Lo = DAG.getNode(Op.getOpcode(), dl, LoVTs, LHSLo, RHSLo); in LowerMULO()
37140 KnownBits RHSLo = DAG.computeKnownBits(RHS, DemandedLoElts, Depth + 1); in computeKnownBitsForPMADDWD() local
37142 KnownBits Lo = KnownBits::mul(LHSLo.sext(32), RHSLo.sext(32)); in computeKnownBitsForPMADDWD()
37164 KnownBits RHSLo = DAG.computeKnownBits(RHS, DemandedLoElts, Depth + 1); in computeKnownBitsForPMADDUBSW() local
37166 KnownBits Lo = KnownBits::mul(LHSLo.zext(16), RHSLo.sext(16)); in computeKnownBitsForPMADDUBSW()
57363 APInt RHSLo = RHSBits[I + 0], RHSHi = RHSBits[I + 1]; in combineVPMADD() local
57366 APInt Lo = LHSLo * RHSLo.sext(DstEltBits); in combineVPMADD()