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Searched refs:RHSExt (Results 1 – 5 of 5) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp4962 auto RHSExt = B.buildFPExt(S32, RHS, Flags); in legalizeFDIV16() local
4963 auto NegRHSExt = B.buildFNeg(S32, RHSExt); in legalizeFDIV16()
4965 .addUse(RHSExt.getReg(0)) in legalizeFDIV16()
H A DSIISelLowering.cpp11253 SDValue RHSExt = DAG.getNode(ISD::FP_EXTEND, SL, MVT::f32, RHS); in LowerFDIV16() local
11254 SDValue NegRHSExt = DAG.getNode(ISD::FNEG, SL, MVT::f32, RHSExt); in LowerFDIV16()
11256 DAG.getNode(AMDGPUISD::RCP, SL, MVT::f32, RHSExt, Op->getFlags()); in LowerFDIV16()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp2538 auto RHSExt = MIRBuilder.buildInstr(ExtOpcode, {WideTy}, {MI.getOperand(3)}); in widenScalarAddSubOverflow() local
2545 {LHSExt, RHSExt, *CarryIn}) in widenScalarAddSubOverflow()
2548 NewOp = MIRBuilder.buildInstr(Opcode, {WideTy}, {LHSExt, RHSExt}).getReg(0); in widenScalarAddSubOverflow()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp17020 std::optional<ExtKind> RHSExt; member
17030 const NodeExtensionHelper &RHS, std::optional<ExtKind> RHSExt) in CombineResult()
17031 : TargetOpcode(TargetOpcode), LHSExt(LHSExt), RHSExt(RHSExt), Root(Root), in CombineResult()
17056 RHS.getOrCreateExtendedOp(Root, DAG, Subtarget, RHSExt), in materialize()
17381 if (Res->RHSExt.has_value()) in combineOp_VLToVWOp_VL()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp11209 SDValue RHSExt = DAG.getNode(Ext, dl, WideVT, RHS); in expandFixedPointMul() local
11210 SDValue Res = DAG.getNode(ISD::MUL, dl, WideVT, LHSExt, RHSExt); in expandFixedPointMul()