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Searched refs:RHSC (Results 1 – 25 of 37) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelDAGToDAG.cpp114 int32_t RHSC = RHS->getSExtValue(); in SelectAddrModeS9() local
116 RHSC = -RHSC; in SelectAddrModeS9()
119 if (!isInt<9>(RHSC)) in SelectAddrModeS9()
127 Offset = CurDAG->getTargetConstant(RHSC, SDLoc(Addr), MVT::i32); in SelectAddrModeS9()
143 int32_t RHSC = RHS->getSExtValue(); in SelectAddrModeFar() local
145 RHSC = -RHSC; in SelectAddrModeFar()
147 Offset = CurDAG->getTargetConstant(RHSC, SDLoc(Addr), MVT::i32); in SelectAddrModeFar()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp695 int RHSC = (int)RHS->getSExtValue(); in SelectAddrModeImm12() local
697 RHSC = -RHSC; in SelectAddrModeImm12()
699 if (RHSC > -0x1000 && RHSC < 0x1000) { // 12 bits in SelectAddrModeImm12()
706 OffImm = CurDAG->getSignedTargetConstant(RHSC, SDLoc(N), MVT::i32); in SelectAddrModeImm12()
725 int RHSC = (int)RHS->getZExtValue(); in SelectLdStSOReg() local
726 if (RHSC & 1) { in SelectLdStSOReg()
727 RHSC = RHSC & ~1; in SelectLdStSOReg()
729 if (RHSC < 0) { in SelectLdStSOReg()
731 RHSC = - RHSC; in SelectLdStSOReg()
733 if (isPowerOf2_32(RHSC)) { in SelectLdStSOReg()
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H A DARMISelLowering.cpp4838 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS.getNode())) { in getARMCmp() local
4839 unsigned C = RHSC->getZExtValue(); in getARMCmp()
4908 auto *RHSC = cast<ConstantSDNode>(RHS.getNode()); in getARMCmp() local
4909 uint64_t RHSV = RHSC->getZExtValue(); in getARMCmp()
5518 ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS); in LowerSELECT_CC() local
5523 if (CC == ISD::SETGT && RHSC && RHSC->isAllOnes() && CTVal && CFVal && in LowerSELECT_CC()
5537 if ((CC == ISD::SETGT || CC == ISD::SETLT) && LHS == TrueVal && RHSC && in LowerSELECT_CC()
5538 RHSC->isZero() && CFVal && CFVal->isZero() && in LowerSELECT_CC()
19731 int RHSC = (int)RHS->getZExtValue(); in getARMIndexedAddressParts() local
19732 if (RHSC < 0 && RHSC > -256) { in getARMIndexedAddressParts()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelDAGToDAG.cpp101 int RHSC = (int)RHS->getZExtValue(); in SelectAddr() local
105 RHSC = -RHSC; in SelectAddr()
116 Disp = CurDAG->getTargetConstant(RHSC, dl, MVT::i16); in SelectAddr()
128 bool OkI8 = VT == MVT::i8 && RHSC <= 63; in SelectAddr()
129 bool OkI16 = VT == MVT::i16 && RHSC <= 62; in SelectAddr()
133 Disp = CurDAG->getTargetConstant(RHSC, dl, MVT::i8); in SelectAddr()
H A DAVRISelLowering.cpp1050 int RHSC = RHS->getSExtValue(); in getPreIndexedAddressParts() local
1052 RHSC = -RHSC; in getPreIndexedAddressParts()
1054 if ((VT == MVT::i16 && RHSC != -2) || (VT == MVT::i8 && RHSC != -1)) { in getPreIndexedAddressParts()
1059 Offset = DAG.getSignedConstant(RHSC, DL, MVT::i8); in getPreIndexedAddressParts()
1110 int RHSC = RHS->getSExtValue(); in getPostIndexedAddressParts() local
1112 RHSC = -RHSC; in getPostIndexedAddressParts()
1113 if ((VT == MVT::i16 && RHSC != 2) || (VT == MVT::i8 && RHSC != 1)) { in getPostIndexedAddressParts()
1130 Offset = DAG.getConstant(RHSC, DL, MVT::i8); in getPostIndexedAddressParts()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineAndOrXor.cpp1515 const APFloat *LHSC, *RHSC; in foldLogicOfFCmps() local
1519 match(RHS1, m_APFloatAllowPoison(RHSC)) && in foldLogicOfFCmps()
1520 LHSC->bitwiseIsEqual(neg(*RHSC))) { in foldLogicOfFCmps()
1533 std::swap(LHSC, RHSC); in foldLogicOfFCmps()
2284 const APInt *RHSC; in foldBitwiseLogicWithIntrinsics() local
2287 !match(I.getOperand(1), m_APInt(RHSC)))) in foldBitwiseLogicWithIntrinsics()
2309 ? RHSC->byteSwap() in foldBitwiseLogicWithIntrinsics()
2310 : RHSC->reverseBits())); in foldBitwiseLogicWithIntrinsics()
3343 const APInt *LHSC = nullptr, *RHSC = nullptr; in foldAndOrOfICmps() local
3345 match(RHS1, m_APInt(RHSC)); in foldAndOrOfICmps()
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H A DInstCombineCompares.cpp2474 APInt RHSC = C; in foldICmpShlConstant() local
2476 if (RHSC.countr_zero() < Amt && ICmpInst::isStrictPredicate(CmpPred)) { in foldICmpShlConstant()
2486 RHSC = cast<ConstantInt>(FlippedStrictness->second)->getValue(); in foldICmpShlConstant()
2490 if (RHSC.countr_zero() >= Amt) { in foldICmpShlConstant()
2493 ConstantInt::get(TruncTy, RHSC.ashr(*ShiftAmt).trunc(TypeBits - Amt)); in foldICmpShlConstant()
4302 Constant *RHSC = dyn_cast<Constant>(Op1); in foldICmpInstWithConstantNotInt() local
4304 if (!RHSC || !LHSI) in foldICmpInstWithConstantNotInt()
4314 if (RHSC->isNullValue() && in foldICmpInstWithConstantNotInt()
4315 DL.getIntPtrType(RHSC->getType()) == LHSI->getOperand(0)->getType()) in foldICmpInstWithConstantNotInt()
5440 if (Constant *RHSC = dyn_cast<Constant>(Op1)) in foldICmpBinOp() local
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H A DInstCombineCalls.cpp2103 const APInt *RHSC; in visitCallInst() local
2104 if (match(I0, m_OneUse(m_And(m_Value(X), m_NegatedPower2(RHSC)))) && in visitCallInst()
2105 match(I1, m_OneUse(m_And(m_Value(Y), m_SpecificInt(*RHSC))))) in visitCallInst()
2107 ConstantInt::get(II->getType(), *RHSC)); in visitCallInst()
2150 if (match(I1, m_APIntAllowPoison(RHSC))) { in visitCallInst()
2157 if (LHS_CR.icmp(Pred, *RHSC)) in visitCallInst()
2159 if (LHS_CR.icmp(ICmpInst::getSwappedPredicate(Pred), *RHSC)) in visitCallInst()
2161 ConstantInt::get(II->getType(), *RHSC)); in visitCallInst()
H A DInstCombineInternal.h703 Constant *RHSC);
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp804 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) in IntCondCCodeToICC() local
805 if (RHSC->getZExtValue() == 0xFFFFFFFF) { in IntCondCCodeToICC()
814 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) in IntCondCCodeToICC() local
815 if (RHSC->getZExtValue() == 0) in IntCondCCodeToICC()
822 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) in IntCondCCodeToICC() local
823 if (RHSC->getZExtValue() == 0xFFFFFFFF) { in IntCondCCodeToICC()
832 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) in IntCondCCodeToICC() local
833 if (RHSC->getZExtValue() == 0) in IntCondCCodeToICC()
/freebsd/contrib/llvm-project/llvm/lib/MC/
H A DMCExpr.cpp138 if (const MCConstantExpr *RHSC = dyn_cast<MCConstantExpr>(BE.getRHS())) { in print() local
139 if (RHSC->getValue() < 0) { in print()
140 OS << RHSC->getValue(); in print()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVInstructionSelector.cpp572 int64_t RHSC = RHSDef->getOperand(1).getCImm()->getSExtValue(); in selectAddrRegImm() local
573 if (isInt<12>(RHSC)) { in selectAddrRegImm()
577 [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC); }, in selectAddrRegImm()
581 [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC); }}}; in selectAddrRegImm()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp751 ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(N.getOperand(1)); in SelectShiftedRegisterFromAnd() local
752 if (!RHSC) in SelectShiftedRegisterFromAnd()
755 APInt AndMask = RHSC->getAPIntValue(); in SelectShiftedRegisterFromAnd()
1069 int64_t RHSC = RHS->getSExtValue(); in SelectAddrModeIndexedBitWidth() local
1073 if ((RHSC & (Size - 1)) == 0 && RHSC >= -(Range << Scale) && in SelectAddrModeIndexedBitWidth()
1074 RHSC < (Range << Scale)) { in SelectAddrModeIndexedBitWidth()
1080 OffImm = CurDAG->getTargetConstant(RHSC >> Scale, dl, MVT::i64); in SelectAddrModeIndexedBitWidth()
1085 uint64_t RHSC = RHS->getZExtValue(); in SelectAddrModeIndexedBitWidth() local
1089 if ((RHSC & (Size - 1)) == 0 && RHSC < (Range << Scale)) { in SelectAddrModeIndexedBitWidth()
1095 OffImm = CurDAG->getTargetConstant(RHSC >> Scale, dl, MVT::i64); in SelectAddrModeIndexedBitWidth()
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/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp1226 uint64_t RHSC = RHS->getZExtValue(); in getPostIndexedAddressParts() local
1227 if ((VT == MVT::i16 && RHSC != 2) || in getPostIndexedAddressParts()
1228 (VT == MVT::i8 && RHSC != 1)) in getPostIndexedAddressParts()
1232 Offset = DAG.getConstant(RHSC, SDLoc(N), VT); in getPostIndexedAddressParts()
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DScalarEvolution.cpp2344 auto *RHSC = dyn_cast<SCEVConstant>(RHS); in willNotOverflow() local
2346 if (!RHSC) in willNotOverflow()
2348 APInt C = RHSC->getAPInt(); in willNotOverflow()
3367 if (const SCEVConstant *RHSC = dyn_cast<SCEVConstant>(RHS)) { in getURemExpr() local
3369 if (RHSC->getValue()->isOne()) in getURemExpr()
3373 if (RHSC->getAPInt().isPowerOf2()) { in getURemExpr()
3376 IntegerType::get(getContext(), RHSC->getAPInt().logBase2()); in getURemExpr()
3408 if (const SCEVConstant *RHSC = dyn_cast<SCEVConstant>(RHS)) { in getUDivExpr() local
3409 if (RHSC->getValue()->isOne()) in getUDivExpr()
3414 if (!RHSC->getValue()->isZero()) { in getUDivExpr()
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H A DBasicAliasAnalysis.cpp428 if (ConstantInt *RHSC = dyn_cast<ConstantInt>(BOp->getOperand(1))) { in GetLinearExpression() local
429 APInt RHS = Val.evaluateWith(RHSC->getValue()); in GetLinearExpression()
H A DValueTracking.cpp1739 const APInt *RHSC; in computeKnownBitsFromOperator() local
1743 m_Br(m_c_ICmp(Pred, m_Specific(IncValue), m_APInt(RHSC)), in computeKnownBitsFromOperator()
1752 auto CR = ConstantRange::makeExactICmpRegion(Pred, *RHSC); in computeKnownBitsFromOperator()
2395 const APInt *RHSC; in isImpliedToBeAPowerOfTwoFromCond() local
2397 m_APInt(RHSC)))) in isImpliedToBeAPowerOfTwoFromCond()
2402 if (OrZero && Pred == ICmpInst::ICMP_ULT && *RHSC == 2) in isImpliedToBeAPowerOfTwoFromCond()
2405 return Pred == ICmpInst::ICMP_EQ && *RHSC == 1; in isImpliedToBeAPowerOfTwoFromCond()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DSCCPSolver.cpp245 const APInt *RHSC; in simplifyInstruction() local
247 if (match(&Inst, m_And(m_Value(X), m_LowBitMask(RHSC)))) { in simplifyInstruction()
249 if (LRange.getUnsignedMax().ule(*RHSC)) in simplifyInstruction()
H A DSimplifyCFG.cpp598 const APInt *RHSC; in matchInstruction() local
645 m_And(m_Value(RHSVal), m_APInt(RHSC)))) { in matchInstruction()
646 APInt Mask = ~*RHSC; in matchInstruction()
668 m_Or(m_Value(RHSVal), m_APInt(RHSC)))) { in matchInstruction()
669 APInt Mask = *RHSC; in matchInstruction()
699 if (match(I->getOperand(0), m_Add(m_Value(RHSVal), m_APInt(RHSC)))) { in matchInstruction()
700 Span = Span.subtract(*RHSC); in matchInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp7590 int64_t RHSC; in selectAddrModeUnscaled() local
7594 RHSC = RHSOp1.getCImm()->getSExtValue(); in selectAddrModeUnscaled()
7596 if (RHSC >= -256 && RHSC < 256) { in selectAddrModeUnscaled()
7600 [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC); }, in selectAddrModeUnscaled()
7679 int64_t RHSC = (int64_t)RHSDef->getOperand(1).getCImm()->getZExtValue(); in selectAddrModeIndexed() local
7681 if ((RHSC & (Size - 1)) == 0 && RHSC >= 0 && RHSC < (0x1000 << Scale)) { in selectAddrModeIndexed()
7685 [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC >> Scale); }, in selectAddrModeIndexed()
7690 [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC >> Scale); }, in selectAddrModeIndexed()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DBasicTTIImpl.h1873 if (auto *RHSC = dyn_cast<ConstantInt>(Args[1])) { in getIntrinsicInstrCost() local
1875 if (getTLI()->isBeneficialToExpandPowI(RHSC->getSExtValue(), in getIntrinsicInstrCost()
1879 APInt Exponent = RHSC->getValue().abs(); in getIntrinsicInstrCost()
1885 if (RHSC->isNegative()) in getIntrinsicInstrCost()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastISel.cpp1384 static unsigned X86ChooseCmpImmediateOpcode(EVT VT, const ConstantInt *RHSC) { in X86ChooseCmpImmediateOpcode() argument
1398 return isInt<32>(RHSC->getSExtValue()) ? X86::CMP64ri32 : 0; in X86ChooseCmpImmediateOpcode()
1482 const auto *RHSC = dyn_cast<ConstantFP>(RHS); in X86SelectCmp() local
1483 if (RHSC && RHSC->isNullValue()) in X86SelectCmp()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp1759 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) { in TranslateM68kCC() local
1760 if (SetCCOpcode == ISD::SETGT && RHSC->isAllOnes()) { in TranslateM68kCC()
1765 if (SetCCOpcode == ISD::SETLT && RHSC->isZero()) { in TranslateM68kCC()
1769 if (SetCCOpcode == ISD::SETLT && RHSC->getZExtValue() == 1) { in TranslateM68kCC()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/IPO/
H A DIROutliner.cpp181 const ConstantInt *RHSC = cast<ConstantInt>(RHS); in getSortedConstantKeys() local
183 return LHSC->getLimitedValue() < RHSC->getLimitedValue(); in getSortedConstantKeys()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp1451 if (ConstantSDNode *RHSC = isConstOrConstSplat(Op1, DemandedElts)) { in SimplifyDemandedBits() local
1456 (~RHSC->getAPIntValue() & DemandedBits)) in SimplifyDemandedBits()
1471 LHSKnown.One == ~RHSC->getAPIntValue()) { in SimplifyDemandedBits()
5527 if (auto *RHSC = dyn_cast<ConstantSDNode>(N1)) { in SimplifySetCC() local
5533 DAG.getConstant(RHSC->getAPIntValue() - LHSR->getAPIntValue(), in SimplifySetCC()
5541 DAG.getConstant(LHSR->getAPIntValue() ^ RHSC->getAPIntValue(), in SimplifySetCC()
5551 DAG.getConstant(SUBC->getAPIntValue() - RHSC->getAPIntValue(), in SimplifySetCC()
5556 if (RHSC->getValueType(0).getSizeInBits() <= 64) in SimplifySetCC()
5557 LegalRHSImm = isLegalICmpImmediate(RHSC->getSExtValue()); in SimplifySetCC()
11469 if (ConstantSDNode *RHSC = isConstOrConstSplat(RHS)) { in expandMULO() local
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