/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
H A D | ARCISelDAGToDAG.cpp | 113 int32_t RHSC = RHS->getSExtValue(); in SelectAddrModeS9() local 115 RHSC = -RHSC; in SelectAddrModeS9() 118 if (!isInt<9>(RHSC)) in SelectAddrModeS9() 126 Offset = CurDAG->getTargetConstant(RHSC, SDLoc(Addr), MVT::i32); in SelectAddrModeS9() 142 int32_t RHSC = RHS->getSExtValue(); in SelectAddrModeFar() local 144 RHSC = -RHSC; in SelectAddrModeFar() 146 Offset = CurDAG->getTargetConstant(RHSC, SDLoc(Addr), MVT::i32); in SelectAddrModeFar()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 704 int RHSC = (int)RHS->getSExtValue(); in SelectAddrModeImm12() local 706 RHSC = -RHSC; in SelectAddrModeImm12() 708 if (RHSC > -0x1000 && RHSC < 0x1000) { // 12 bits in SelectAddrModeImm12() 715 OffImm = CurDAG->getTargetConstant(RHSC, SDLoc(N), MVT::i32); in SelectAddrModeImm12() 734 int RHSC = (int)RHS->getZExtValue(); in SelectLdStSOReg() local 735 if (RHSC & 1) { in SelectLdStSOReg() 736 RHSC = RHSC & ~1; in SelectLdStSOReg() 738 if (RHSC < 0) { in SelectLdStSOReg() 740 RHSC = - RHSC; in SelectLdStSOReg() 742 if (isPowerOf2_32(RHSC)) { in SelectLdStSOReg() [all …]
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H A D | ARMISelLowering.cpp | 4750 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS.getNode())) { in getARMCmp() local 4751 unsigned C = RHSC->getZExtValue(); in getARMCmp() 4820 auto *RHSC = cast<ConstantSDNode>(RHS.getNode()); in getARMCmp() local 4821 uint64_t RHSV = RHSC->getZExtValue(); in getARMCmp() 19796 int RHSC = (int)RHS->getZExtValue(); in getARMIndexedAddressParts() local 19797 if (RHSC < 0 && RHSC > -256) { in getARMIndexedAddressParts() 19800 Offset = DAG.getConstant(-RHSC, SDLoc(Ptr), RHS->getValueType(0)); in getARMIndexedAddressParts() 19810 int RHSC = (int)RHS->getZExtValue(); in getARMIndexedAddressParts() local 19811 if (RHSC < 0 && RHSC > -0x1000) { in getARMIndexedAddressParts() 19814 Offset = DAG.getConstant(-RHSC, SDLoc(Ptr), RHS->getValueType(0)); in getARMIndexedAddressParts() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRISelDAGToDAG.cpp | 101 int RHSC = (int)RHS->getZExtValue(); in SelectAddr() local 105 RHSC = -RHSC; in SelectAddr() 116 Disp = CurDAG->getTargetConstant(RHSC, dl, MVT::i16); in SelectAddr() 128 bool OkI8 = VT == MVT::i8 && RHSC <= 63; in SelectAddr() 129 bool OkI16 = VT == MVT::i16 && RHSC <= 62; in SelectAddr() 133 Disp = CurDAG->getTargetConstant(RHSC, dl, MVT::i8); in SelectAddr()
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H A D | AVRISelLowering.cpp | 1106 int RHSC = RHS->getSExtValue(); in getPreIndexedAddressParts() local 1108 RHSC = -RHSC; in getPreIndexedAddressParts() 1110 if ((VT == MVT::i16 && RHSC != -2) || (VT == MVT::i8 && RHSC != -1)) { in getPreIndexedAddressParts() 1115 Offset = DAG.getConstant(RHSC, DL, MVT::i8); in getPreIndexedAddressParts() 1163 int RHSC = RHS->getSExtValue(); in getPostIndexedAddressParts() local 1165 RHSC = -RHSC; in getPostIndexedAddressParts() 1166 if ((VT == MVT::i16 && RHSC != 2) || (VT == MVT::i8 && RHSC != 1)) { in getPostIndexedAddressParts() 1177 Offset = DAG.getConstant(RHSC, DL, MVT::i8); in getPostIndexedAddressParts()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.cpp | 815 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) in IntCondCCodeToICC() local 816 if (RHSC->getZExtValue() == 0xFFFFFFFF) { in IntCondCCodeToICC() 825 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) in IntCondCCodeToICC() local 826 if (RHSC->getZExtValue() == 0) in IntCondCCodeToICC() 833 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) in IntCondCCodeToICC() local 834 if (RHSC->getZExtValue() == 0xFFFFFFFF) { in IntCondCCodeToICC() 843 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) in IntCondCCodeToICC() local 844 if (RHSC->getZExtValue() == 0) in IntCondCCodeToICC()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineAndOrXor.cpp | 1471 const APFloat *LHSC, *RHSC; in foldLogicOfFCmps() local 1475 match(RHS1, m_APFloatAllowPoison(RHSC)) && in foldLogicOfFCmps() 1476 LHSC->bitwiseIsEqual(neg(*RHSC))) { in foldLogicOfFCmps() 1489 std::swap(LHSC, RHSC); in foldLogicOfFCmps() 2229 const APInt *RHSC; in foldBitwiseLogicWithIntrinsics() local 2232 !match(I.getOperand(1), m_APInt(RHSC)))) in foldBitwiseLogicWithIntrinsics() 2253 ? RHSC->byteSwap() in foldBitwiseLogicWithIntrinsics() 2254 : RHSC->reverseBits())); in foldBitwiseLogicWithIntrinsics() 3291 const APInt *LHSC = nullptr, *RHSC = nullptr; in foldAndOrOfICmps() local 3293 match(RHS1, m_APInt(RHSC)); in foldAndOrOfICmps() [all …]
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H A D | InstCombineCompares.cpp | 2423 APInt RHSC = C; in foldICmpShlConstant() local 2425 if (RHSC.countr_zero() < Amt && ICmpInst::isStrictPredicate(CmpPred)) { in foldICmpShlConstant() 2436 RHSC = cast<ConstantInt>(FlippedStrictness->second)->getValue(); in foldICmpShlConstant() 2440 if (RHSC.countr_zero() >= Amt) { in foldICmpShlConstant() 2443 ConstantInt::get(TruncTy, RHSC.ashr(*ShiftAmt).trunc(TypeBits - Amt)); in foldICmpShlConstant() 4093 Constant *RHSC = dyn_cast<Constant>(Op1); in foldICmpInstWithConstantNotInt() local 4095 if (!RHSC || !LHSI) in foldICmpInstWithConstantNotInt() 4105 if (RHSC->isNullValue() && in foldICmpInstWithConstantNotInt() 4106 DL.getIntPtrType(RHSC->getType()) == LHSI->getOperand(0)->getType()) in foldICmpInstWithConstantNotInt() 5186 if (Constant *RHSC = dyn_cast<Constant>(Op1)) in foldICmpBinOp() local [all …]
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H A D | InstCombineCalls.cpp | 1847 const APInt *RHSC; in visitCallInst() local 1848 if (match(I0, m_OneUse(m_And(m_Value(X), m_NegatedPower2(RHSC)))) && in visitCallInst() 1849 match(I1, m_OneUse(m_And(m_Value(Y), m_SpecificInt(*RHSC))))) in visitCallInst() 1851 ConstantInt::get(II->getType(), *RHSC)); in visitCallInst() 1894 if (match(I1, m_APIntAllowPoison(RHSC))) { in visitCallInst() 1901 if (LHS_CR.icmp(Pred, *RHSC)) in visitCallInst() 1903 if (LHS_CR.icmp(ICmpInst::getSwappedPredicate(Pred), *RHSC)) in visitCallInst() 1905 ConstantInt::get(II->getType(), *RHSC)); in visitCallInst()
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H A D | InstCombineInternal.h | 655 Constant *RHSC);
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/freebsd/contrib/llvm-project/llvm/lib/MC/ |
H A D | MCExpr.cpp | 128 if (const MCConstantExpr *RHSC = dyn_cast<MCConstantExpr>(BE.getRHS())) { in print() local 129 if (RHSC->getValue() < 0) { in print() 130 OS << RHSC->getValue(); in print()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
H A D | RISCVInstructionSelector.cpp | 404 int64_t RHSC = RHSDef->getOperand(1).getCImm()->getSExtValue(); in selectAddrRegImm() local 405 if (isInt<12>(RHSC)) { in selectAddrRegImm() 409 [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC); }, in selectAddrRegImm() 413 [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC); }}}; in selectAddrRegImm()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 747 ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(N.getOperand(1)); in SelectShiftedRegisterFromAnd() local 748 if (!RHSC) in SelectShiftedRegisterFromAnd() 751 APInt AndMask = RHSC->getAPIntValue(); in SelectShiftedRegisterFromAnd() 1065 int64_t RHSC = RHS->getSExtValue(); in SelectAddrModeIndexedBitWidth() local 1069 if ((RHSC & (Size - 1)) == 0 && RHSC >= -(Range << Scale) && in SelectAddrModeIndexedBitWidth() 1070 RHSC < (Range << Scale)) { in SelectAddrModeIndexedBitWidth() 1076 OffImm = CurDAG->getTargetConstant(RHSC >> Scale, dl, MVT::i64); in SelectAddrModeIndexedBitWidth() 1081 uint64_t RHSC = RHS->getZExtValue(); in SelectAddrModeIndexedBitWidth() local 1085 if ((RHSC & (Size - 1)) == 0 && RHSC < (Range << Scale)) { in SelectAddrModeIndexedBitWidth() 1091 OffImm = CurDAG->getTargetConstant(RHSC >> Scale, dl, MVT::i64); in SelectAddrModeIndexedBitWidth() [all …]
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H A D | AArch64ISelLowering.cpp | 3842 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS.getNode())) { in getAArch64Cmp() local 3844 uint64_t C = RHSC->getZExtValue(); in getAArch64Cmp() 3924 const ConstantSDNode *RHSC = cast<ConstantSDNode>(RHS); in getAArch64Cmp() local 3942 if ((RHSC->getZExtValue() >> 16 == 0) && isa<LoadSDNode>(LHS) && in getAArch64Cmp() 3958 if (!Cmp && (RHSC->isZero() || RHSC->isOne())) { in getAArch64Cmp() 3960 if ((CC == ISD::SETNE) ^ RHSC->isZero()) in getAArch64Cmp() 9854 const ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS); in LowerBR_CC() local 9855 if (RHSC && RHSC->getZExtValue() == 0 && ProduceNonFlagSettingCondBr) { in LowerBR_CC() 9898 if (RHSC && RHSC->getSExtValue() == -1 && CC == ISD::SETGT && in LowerBR_CC() 10455 ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS); in LowerSELECT_CC() local [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | ScalarEvolution.cpp | 2341 auto *RHSC = dyn_cast<SCEVConstant>(RHS); in willNotOverflow() local 2343 if (!RHSC) in willNotOverflow() 2345 APInt C = RHSC->getAPInt(); in willNotOverflow() 2537 while (const SCEVConstant *RHSC = dyn_cast<SCEVConstant>(Ops[Idx])) { in getAddExpr() local 2539 Ops[0] = getConstant(LHSC->getAPInt() + RHSC->getAPInt()); in getAddExpr() 3130 while (const SCEVConstant *RHSC = dyn_cast<SCEVConstant>(Ops[Idx])) { in getMulExpr() local 3132 Ops[0] = getConstant(LHSC->getAPInt() * RHSC->getAPInt()); in getMulExpr() 3400 if (const SCEVConstant *RHSC = dyn_cast<SCEVConstant>(RHS)) { in getURemExpr() local 3402 if (RHSC->getValue()->isOne()) in getURemExpr() 3406 if (RHSC->getAPInt().isPowerOf2()) { in getURemExpr() [all …]
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H A D | BasicAliasAnalysis.cpp | 407 if (ConstantInt *RHSC = dyn_cast<ConstantInt>(BOp->getOperand(1))) { in GetLinearExpression() local 408 APInt RHS = Val.evaluateWith(RHSC->getValue()); in GetLinearExpression()
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/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 1351 uint64_t RHSC = RHS->getZExtValue(); in getPostIndexedAddressParts() local 1352 if ((VT == MVT::i16 && RHSC != 2) || in getPostIndexedAddressParts() 1353 (VT == MVT::i8 && RHSC != 1)) in getPostIndexedAddressParts() 1357 Offset = DAG.getConstant(RHSC, SDLoc(N), VT); in getPostIndexedAddressParts()
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/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXAsmPrinter.cpp | 2152 if (const MCConstantExpr *RHSC = dyn_cast<MCConstantExpr>(BE.getRHS())) { in printMCExpr() local 2153 if (RHSC->getValue() < 0) { in printMCExpr() 2154 OS << RHSC->getValue(); in printMCExpr()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | BasicTTIImpl.h | 1576 if (auto *RHSC = dyn_cast<ConstantInt>(Args[1])) { in getIntrinsicInstrCost() local 1578 if (getTLI()->isBeneficialToExpandPowI(RHSC->getSExtValue(), in getIntrinsicInstrCost() 1582 APInt Exponent = RHSC->getValue().abs(); in getIntrinsicInstrCost() 1588 if (RHSC->isNegative()) in getIntrinsicInstrCost()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 7417 int64_t RHSC; in selectAddrModeUnscaled() local 7421 RHSC = RHSOp1.getCImm()->getSExtValue(); in selectAddrModeUnscaled() 7423 if (RHSC >= -256 && RHSC < 256) { in selectAddrModeUnscaled() 7427 [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC); }, in selectAddrModeUnscaled() 7501 int64_t RHSC = (int64_t)RHSDef->getOperand(1).getCImm()->getZExtValue(); in selectAddrModeIndexed() local 7503 if ((RHSC & (Size - 1)) == 0 && RHSC >= 0 && RHSC < (0x1000 << Scale)) { in selectAddrModeIndexed() 7507 [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC >> Scale); }, in selectAddrModeIndexed() 7512 [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC >> Scale); }, in selectAddrModeIndexed()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 1385 static unsigned X86ChooseCmpImmediateOpcode(EVT VT, const ConstantInt *RHSC) { in X86ChooseCmpImmediateOpcode() argument 1399 return isInt<32>(RHSC->getSExtValue()) ? X86::CMP64ri32 : 0; in X86ChooseCmpImmediateOpcode() 1481 const auto *RHSC = dyn_cast<ConstantFP>(RHS); in X86SelectCmp() local 1482 if (RHSC && RHSC->isNullValue()) in X86SelectCmp()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
H A D | SimplifyCFG.cpp | 573 const APInt *RHSC; in matchInstruction() local 620 m_And(m_Value(RHSVal), m_APInt(RHSC)))) { in matchInstruction() 621 APInt Mask = ~*RHSC; in matchInstruction() 643 m_Or(m_Value(RHSVal), m_APInt(RHSC)))) { in matchInstruction() 644 APInt Mask = *RHSC; in matchInstruction() 674 if (match(I->getOperand(0), m_Add(m_Value(RHSVal), m_APInt(RHSC)))) { in matchInstruction() 675 Span = Span.subtract(*RHSC); in matchInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
H A D | M68kISelLowering.cpp | 1757 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) { in TranslateM68kCC() local 1758 if (SetCCOpcode == ISD::SETGT && RHSC->isAllOnes()) { in TranslateM68kCC() 1763 if (SetCCOpcode == ISD::SETLT && RHSC->isZero()) { in TranslateM68kCC() 1767 if (SetCCOpcode == ISD::SETLT && RHSC->getZExtValue() == 1) { in TranslateM68kCC()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/IPO/ |
H A D | IROutliner.cpp | 180 const ConstantInt *RHSC = cast<ConstantInt>(RHS); in getSortedConstantKeys() local 182 return LHSC->getLimitedValue() < RHSC->getLimitedValue(); in getSortedConstantKeys()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1396 if (ConstantSDNode *RHSC = isConstOrConstSplat(Op1, DemandedElts)) { in SimplifyDemandedBits() local 1401 (~RHSC->getAPIntValue() & DemandedBits)) in SimplifyDemandedBits() 1416 LHSKnown.One == ~RHSC->getAPIntValue()) { in SimplifyDemandedBits() 5313 if (auto *RHSC = dyn_cast<ConstantSDNode>(N1)) { in SimplifySetCC() local 5319 DAG.getConstant(RHSC->getAPIntValue() - LHSR->getAPIntValue(), in SimplifySetCC() 5327 DAG.getConstant(LHSR->getAPIntValue() ^ RHSC->getAPIntValue(), in SimplifySetCC() 5337 DAG.getConstant(SUBC->getAPIntValue() - RHSC->getAPIntValue(), in SimplifySetCC() 5342 if (RHSC->getValueType(0).getSizeInBits() <= 64) in SimplifySetCC() 5343 LegalRHSImm = isLegalICmpImmediate(RHSC->getSExtValue()); in SimplifySetCC() 10967 if (ConstantSDNode *RHSC = isConstOrConstSplat(RHS)) { in expandMULO() local [all …]
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