| /freebsd/contrib/llvm-project/llvm/include/llvm/Support/ |
| H A D | InstructionCost.h | 112 InstructionCost RHS2(RHS);
113 *this += RHS2;
129 InstructionCost RHS2(RHS);
130 *this -= RHS2;
151 InstructionCost RHS2(RHS);
152 *this *= RHS2;
163 InstructionCost RHS2(RHS);
164 *this /= RHS2;
210 InstructionCost RHS2(RHS);
211 return *this == RHS2;
[all …]
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| /freebsd/contrib/llvm-project/llvm/include/llvm/ADT/ |
| H A D | SparseBitVector.h | 239 // RHS1 & ~RHS2 into this element
241 const SparseBitVectorElement &RHS2, in intersectWithComplement()
247 Bits[i] = RHS1.Bits[i] & ~RHS2.Bits[i]; in intersectWithComplement()
687 // Result of RHS1 & ~RHS2 is stored into this bitmap.
689 const SparseBitVector<ElementSize> &RHS2) in intersectWithComplement() argument
692 intersectWithComplement(RHS2); in intersectWithComplement()
694 } else if (this == &RHS2) { in intersectWithComplement()
695 SparseBitVector RHS2Copy(RHS2); in intersectWithComplement()
703 ElementListConstIter Iter2 = RHS2.Elements.begin(); in intersectWithComplement()
706 // If RHS2 i in intersectWithComplement()
735 intersectWithComplement(const SparseBitVector<ElementSize> * RHS1,const SparseBitVector<ElementSize> * RHS2) intersectWithComplement() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | LICM.cpp | 2443 Value *LHS1, *LHS2, *RHS1, *RHS2; in hoistMinMax() local
2445 !MatchICmpAgainstInvariant(Cond2, P2, LHS2, RHS2)) in hoistMinMax()
2466 RHS2 = Builder.CreateFreeze(RHS2, RHS2->getName() + ".fr"); in hoistMinMax()
2468 id, RHS1, RHS2, nullptr, StringRef("invariant.") + in hoistMinMax()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSelect.cpp | 3797 Value *LHS2, *RHS2; in visitSelectInst() local
3798 if (SelectPatternFlavor SPF2 = matchSelectPattern(LHS, LHS2, RHS2).Flavor) in visitSelectInst()
3800 RHS2, SI, SPF, RHS)) in visitSelectInst()
3802 if (SelectPatternFlavor SPF2 = matchSelectPattern(RHS, LHS2, RHS2).Flavor) in visitSelectInst()
3804 RHS2, SI, SPF, LHS)) in visitSelectInst()
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| H A D | InstCombineCompares.cpp | 3181 Value *LHS2, *RHS2; in matchThreeWayIntCompare() local
3182 if (!match(UnequalVal, m_Select(m_ICmp(PredB, m_Value(LHS2), m_Value(RHS2)), in matchThreeWayIntCompare()
3189 std::swap(LHS2, RHS2); in matchThreeWayIntCompare()
3195 if (PredB == ICmpInst::ICMP_SGT && isa<Constant>(RHS2)) { in matchThreeWayIntCompare()
3199 PredB, cast<Constant>(RHS2)); in matchThreeWayIntCompare()
3204 RHS2 = FlippedStrictness->second; in matchThreeWayIntCompare()
3209 return PredB == ICmpInst::ICMP_SLT && RHS == RHS2; in matchThreeWayIntCompare()
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ValueTracking.cpp | 3683 const Value *LHS2 = nullptr, *RHS2 = nullptr; in isSignedMinMaxClamp() local
3684 SelectPatternFlavor SPF2 = matchSelectPattern(LHS, LHS2, RHS2).Flavor; in isSignedMinMaxClamp()
3688 if (!match(RHS2, m_APInt(CHigh))) in isSignedMinMaxClamp()
9239 const Value *RHS1, *RHS2; in isImpliedCondition() local
9240 if (match(RHS, m_LogicalOr(m_Value(RHS1), m_Value(RHS2)))) { in isImpliedCondition()
9246 isImpliedCondition(LHS, RHS2, DL, LHSIsTrue, Depth + 1)) in isImpliedCondition()
9250 if (match(RHS, m_LogicalAnd(m_Value(RHS1), m_Value(RHS2)))) { in isImpliedCondition()
9256 isImpliedCondition(LHS, RHS2, DL, LHSIsTrue, Depth + 1)) in isImpliedCondition()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 829 SDValue RHS2 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, RHS_1, in getAVRCmp() local
842 Cmp = DAG.getNode(AVRISD::CMPC, DL, MVT::Glue, LHS2, RHS2, Cmp); in getAVRCmp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 5696 SDValue RHS1, RHS2; in OptimizeVFPBrcond() local
5698 expandf64Toi32(RHS, DAG, RHS1, RHS2); in OptimizeVFPBrcond()
5700 RHS2 = DAG.getNode(ISD::AND, dl, MVT::i32, RHS2, Mask); in OptimizeVFPBrcond()
5704 SDValue Ops[] = { Chain, ARMcc, LHS1, LHS2, RHS1, RHS2, Dest }; in OptimizeVFPBrcond()
12245 Register RHS2 = MI.getOperand(4).getReg(); in EmitInstrWithCustomInserter() local
12251 .addReg(LHS2).addReg(RHS2) in EmitInstrWithCustomInserter()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 7540 SDValue RHS2 = Val.getOperand(1); in matchSetCC()
7543 if (LHS == LHS2 && RHS == RHS2) { in matchSetCC()
7548 } else if (LHS == RHS2 && RHS == LHS2) { in matchSetCC()
7538 SDValue RHS2 = Val.getOperand(1); matchSetCC() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 23122 SDValue RHS1, RHS2; in splitIntVSETCC() local
23123 std::tie(RHS1, RHS2) = splitVector(RHS, DAG, dl); in splitIntVSETCC()
23130 DAG.getNode(ISD::SETCC, dl, HiVT, LHS2, RHS2, CC)); in splitIntVSETCC()
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