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Searched refs:RH (Results 1 – 25 of 27) sorted by relevance

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/freebsd/crypto/libecc/src/examples/hash/
H A Dtdes.c195 static const u32 RH[16] = variable
278 D = (RH[ (D >> 1) & 0xF] << 3) | (RH[ (D >> 9) & 0xF ] << 2) in des_set_key()
279 | (RH[ (D >> 17) & 0xF] << 1) | (RH[ (D >> 25) & 0xF ] ) in des_set_key()
280 | (RH[ (D >> 4) & 0xF] << 7) | (RH[ (D >> 12) & 0xF ] << 6) in des_set_key()
281 | (RH[ (D >> 20) & 0xF] << 5) | (RH[ (D >> 28) & 0xF ] << 4); in des_set_key()
/freebsd/bin/chmod/tests/
H A Dchmod_test.sh47 atf_check chmod -RH 0700 A
49 atf_check chmod -RH 0600 A/C
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypesGeneric.cpp507 SDValue LL, LH, RL, RH, CL, CH; in SplitRes_Select() local
511 GetSplitOp(N->getOperand(2), RL, RH); in SplitRes_Select()
542 Hi = DAG.getNode(Opcode, dl, LH.getValueType(), CH, LH, RH); in SplitRes_Select()
551 Hi = DAG.getNode(Opcode, dl, LH.getValueType(), CH, LH, RH, EVLHi); in SplitRes_Select()
556 SDValue LL, LH, RL, RH; in SplitRes_SELECT_CC() local
559 GetSplitOp(N->getOperand(3), RL, RH); in SplitRes_SELECT_CC()
564 N->getOperand(1), LH, RH, N->getOperand(4)); in SplitRes_SELECT_CC()
H A DTargetLowering.cpp7547 SDValue LH, SDValue RL, SDValue RH) const { in expandMUL_LOHI()
7567 assert((LL.getNode() && LH.getNode() && RL.getNode() && RH.getNode()) || in expandMUL_LOHI()
7568 (!LL.getNode() && !LH.getNode() && !RL.getNode() && !RH.getNode())); in expandMUL_LOHI()
7628 if (!LH.getNode() && !RH.getNode() && in expandMUL_LOHI()
7633 RH = DAG.getNode(ISD::SRL, dl, VT, RHS, Shift); in expandMUL_LOHI()
7634 RH = DAG.getNode(ISD::TRUNCATE, dl, HiLoVT, RH); in expandMUL_LOHI()
7646 RH = DAG.getNode(ISD::MUL, dl, HiLoVT, LL, RH); in expandMUL_LOHI()
7648 Hi = DAG.getNode(ISD::ADD, dl, HiLoVT, Hi, RH); in expandMUL_LOHI()
7663 if (!MakeMUL_LOHI(LL, RH, Lo, Hi, false)) in expandMUL_LOHI()
7689 if (!MakeMUL_LOHI(LH, RH, Lo, Hi, Opcode == ISD::SMUL_LOHI)) in expandMUL_LOHI()
[all …]
H A DLegalizeIntegerTypes.cpp4160 SDValue LL, LH, RL, RH; in ExpandIntRes_Logical() local
4162 GetExpandedInteger(N->getOperand(1), RL, RH); in ExpandIntRes_Logical()
4164 Hi = DAG.getNode(N->getOpcode(), dl, LL.getValueType(), LH, RH); in ExpandIntRes_Logical()
4173 SDValue LL, LH, RL, RH; in ExpandIntRes_MUL() local
4175 GetExpandedInteger(N->getOperand(1), RL, RH); in ExpandIntRes_MUL()
4179 LL, LH, RL, RH)) in ExpandIntRes_MUL()
4196 TLI.forceExpandWideMUL(DAG, dl, /*Signed=*/true, VT, LL, LH, RL, RH, Lo, in ExpandIntRes_MUL()
4296 SDValue LL, LH, RL, RH; in ExpandIntRes_MULFIX() local
4298 GetExpandedInteger(RHS, RL, RH); in ExpandIntRes_MULFIX()
4304 LL, LH, RL, RH)) { in ExpandIntRes_MULFIX()
H A DLegalizeVectorTypes.cpp2432 SDValue LL, LH, RL, RH; in SplitVecRes_SETCC()
2441 GetSplitVector(N->getOperand(1), RL, RH); in SplitVecRes_SETCC()
2443 std::tie(RL, RH) = DAG.SplitVectorOperand(N, 1); in SplitVecRes_SETCC()
2447 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2)); in SplitVecRes_SETCC()
2456 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2), MaskHi,
2428 SDValue LL, LH, RL, RH; SplitVecRes_SETCC() local
/freebsd/bin/cp/tests/
H A Dcp_test.sh130 atf_check cp -RH coo foo/moo
153 atf_check cp -RH roo foo
210 atf_check cp -RH foo foo-mirror
/freebsd/usr.sbin/chown/tests/
H A Dchown_test.sh48 atf_check chown -RH 84:84 A
50 atf_check chown -RH 126:126 A/C
/freebsd/crypto/openssl/doc/man3/
H A DSSL_rstate_string.pod37 =item "RH"/"read header"
/freebsd/share/doc/smm/18.net/
H A Dspell.ok115 RH
/freebsd/share/doc/smm/02.config/
H A Dspell.ok63 RH
/freebsd/share/doc/psd/05.sysman/
H A Dspell.ok52 RH
/freebsd/share/doc/psd/21.ipc/
H A Dspell.ok77 RH
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp1734 BitTracker::RegisterRef RH = MI.getOperand(1), RL = MI.getOperand(2); in propagateRegCopy() local
1736 Changed |= HBS::replaceSubWithSub(RD.Reg, SubHi, RH.Reg, RH.Sub, MRI); in propagateRegCopy()
1789 unsigned B, RegHalf &RH);
1832 const BitTracker::RegisterCell &RC, unsigned B, RegHalf &RH) { in matchHalf() argument
1899 RH.Reg = Reg; in matchHalf()
1900 RH.Sub = Sub; in matchHalf()
1901 RH.Low = Low; in matchHalf()
1903 if (!HBS::getFinalVRegClass(RH, MRI)) in matchHalf()
1904 RH.Sub = 0; in matchHalf()
H A DHexagonConstPropagation.cpp1861 bool evaluateHexRSEQ32(RegisterSubReg RL, RegisterSubReg RH, const CellMap &Inputs,
2515 bool HexagonConstEvaluator::evaluateHexRSEQ32(RegisterSubReg RL, RegisterSubReg RH, in evaluateHexRSEQ32() argument
2517 assert(Inputs.has(RL.Reg) && Inputs.has(RH.Reg)); in evaluateHexRSEQ32()
2519 if (!getCell(RL, Inputs, LSL) || !getCell(RH, Inputs, LSH)) in evaluateHexRSEQ32()
/freebsd/share/doc/smm/01.setup/
H A Dspell.ok132 RH
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp667 SDValue LH, RH; in TryExpandADDWithMul() local
670 RH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in TryExpandADDWithMul()
676 RH = DAG.getNode(ISD::MUL, dl, MVT::i32, LL, RH); in TryExpandADDWithMul()
678 Hi = DAG.getNode(ISD::ADD, dl, MVT::i32, Hi, RH); in TryExpandADDWithMul()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleR52.td300 "t2LD(R|RB|RH)_(PRE|POST)", "t2LD(R|RB|RH)T",
497 "t2STR_preidx", "t2STR[BH]_preidx", "t2ST(RB|RH|R)T")>;
H A DARMScheduleSwift.td368 "t2LD(R|RB|RH)_(PRE|POST)", "t2LD(R|RB|RH)T")>;
498 "t2STR_preidx", "t2STR[BH]_preidx", "t2ST(RB|RH|R)T")>;
/freebsd/contrib/file/magic/Magdir/
H A Delf138 >18 leshort 38 TRW RH-32,
H A Dimages4225 >0 ulelong&0xFFFFF 12 RH
4271 >0 ulelong&0xFFFFF 12 RH
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h5190 SDValue RL = SDValue(), SDValue RH = SDValue()) const;
5204 SDValue RL = SDValue(), SDValue RH = SDValue()) const;
5483 const SDValue RL, const SDValue RH, SDValue &Lo,
/freebsd/contrib/sendmail/contrib/
H A Dmail.local.linux92 MF9F4>2$B0`9FH`-RH`,B$)4@$`+N602Y8YD),`<>(H7W:1NC69,(`3$@<`)D
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DLowerMatrixIntrinsics.cpp1561 Value *RH = Builder.CreateExtractElement( in emitMatrixMultiply() local
1564 Value *Splat = Builder.CreateVectorSplat(BlockSize, RH, "splat"); in emitMatrixMultiply()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp4146 SDValue RH = DAG.getNode(ISD::SRA, DL, VT, RL, C63); in lowerSMUL_LOHI() local
4152 SDValue NegLLTimesRH = DAG.getNode(ISD::AND, DL, VT, LL, RH); in lowerSMUL_LOHI()

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