| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 79 case ISD::READCYCLECOUNTER: in ReplaceNodeResults()
84 DAG.getNode(ISD::READCYCLECOUNTER, SDLoc(N), in ReplaceNodeResults()
174 setOperationAction(ISD::READCYCLECOUNTER, MVT::i32, Legal); in ARCTargetLowering()
175 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, in ARCTargetLowering()
802 case ISD::READCYCLECOUNTER: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1223 READCYCLECOUNTER, enumerator
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 109 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; in getOperationName()
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| H A D | LegalizeDAG.cpp | 1113 case ISD::READCYCLECOUNTER: in LegalizeOp()
3135 case ISD::READCYCLECOUNTER: in ExpandNode()
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| H A D | LegalizeIntegerTypes.cpp | 2813 case ISD::READCYCLECOUNTER: in ExpandIntegerResult()
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| H A D | SelectionDAGBuilder.cpp | 7114 Res = DAG.getNode(ISD::READCYCLECOUNTER, sdl, in visitIntrinsicCall()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 814 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Expand); in initActions()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1988 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Custom); in SparcTargetLowering()
3619 case ISD::READCYCLECOUNTER: { in ReplaceNodeResults()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 723 // Custom-handle ISD::READCYCLECOUNTER because the target-independent SDNode
1521 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Custom); in HexagonTargetLowering()
3400 case ISD::READCYCLECOUNTER: return LowerREADCYCLECOUNTER(Op, DAG); in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 387 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Custom); in SystemZTargetLowering()
6241 case ISD::READCYCLECOUNTER: in LowerOperation()
7099 Op1.getOpcode() == ISD::READCYCLECOUNTER && in combineSTORE()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 700 def readcyclecounter : SDNode<"ISD::READCYCLECOUNTER", SDTIntLeaf,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 498 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Legal); in NVPTXTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 631 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, in RISCVTargetLowering()
12293 case ISD::READCYCLECOUNTER: in ReplaceNodeResults()
12295 assert(!Subtarget.is64Bit() && "READCYCLECOUNTER/READSTEADYCOUNTER only " in ReplaceNodeResults()
12300 if (N->getOpcode() == ISD::READCYCLECOUNTER) { in ReplaceNodeResults()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 1360 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, isPPC64 ? Legal : Custom); in PPCTargetLowering()
11900 case ISD::READCYCLECOUNTER: { in ReplaceNodeResults()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1218 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Custom); in ARMTargetLowering()
10760 case ISD::READCYCLECOUNTER: in ReplaceNodeResults()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 467 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Legal); in SITargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 480 setOperationAction(ISD::READCYCLECOUNTER , MVT::i64 , Custom); in X86TargetLowering()
32471 case ISD::READCYCLECOUNTER: return LowerREADCYCLECOUNTER(Op, Subtarget,DAG); in LowerOperation()
33361 case ISD::READCYCLECOUNTER: { in ReplaceNodeResults()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1007 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Legal); in AArch64TargetLowering()
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