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Searched refs:RCP (Results 1 – 8 of 8) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.h484 RCP, enumerator
H A DAMDGPUISelLowering.cpp665 case AMDGPUISD::RCP: in fnegFoldsIntoOpcode()
920 case AMDGPUISD::RCP: { in getNegatedExpression()
928 return DAG.getNode(AMDGPUISD::RCP, SL, VT, NegSrc, Op->getFlags()); in getNegatedExpression()
1958 fa, DAG.getNode(AMDGPUISD::RCP, DL, FltVT, fb)); in LowerDIVREM24()
2075 SDValue Rcp = DAG.getNode(AMDGPUISD::RCP, DL, MVT::f32, Mad1); in LowerUDIVREM64()
4892 case AMDGPUISD::RCP: in performFNegCombine()
5245 case AMDGPUISD::RCP: in PerformDAGCombine()
5461 NODE_NAME_CASE(RCP) in getTargetNodeName()
5607 return DAG.getNode(AMDGPUISD::RCP, SDLoc(Operand), VT, Operand); in getRecipEstimate()
5932 case AMDGPUISD::RCP: in isKnownNeverNaNForTargetNode()
H A DAMDGPUInstrInfo.td121 def AMDGPUrcp_impl : SDNode<"AMDGPUISD::RCP", SDTFPUnaryOp>;
H A DAMDGPUCodeGenPrepare.cpp1265 Value *RCP = Builder.CreateCall(RcpDecl, { FB }); in expandDivRem24Impl() local
1266 Value *FQM = Builder.CreateFMul(FA, RCP); in expandDivRem24Impl()
H A DAMDGPULegalizerInfo.cpp4829 auto RCP = B.buildIntrinsic(Intrinsic::amdgcn_rcp, {ResTy}) in legalizeFastUnsafeFDIV() local
4832 B.buildFMul(Res, LHS, RCP, Flags); in legalizeFastUnsafeFDIV()
4893 auto RCP = B.buildIntrinsic(Intrinsic::amdgcn_rcp, {S32}) in legalizeFDIV16() local
4897 auto QUOT = B.buildFMul(S32, LHSExt, RCP, Flags); in legalizeFDIV16()
5163 auto RCP = B.buildIntrinsic(Intrinsic::amdgcn_rcp, {S32}) in legalizeFDIVFastIntrin() local
5167 auto Mul1 = B.buildFMul(S32, LHS, RCP, Flags); in legalizeFDIVFastIntrin()
H A DSIISelLowering.cpp8447 return DAG.getNode(AMDGPUISD::RCP, DL, VT, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN()
10475 return DAG.getNode(AMDGPUISD::RCP, SL, VT, RHS); in lowerFastUnsafeFDIV()
10482 return DAG.getNode(AMDGPUISD::RCP, SL, VT, FNegRHS); in lowerFastUnsafeFDIV()
10493 SDValue Recip = DAG.getNode(AMDGPUISD::RCP, SL, VT, RHS); in lowerFastUnsafeFDIV()
10513 SDValue R = DAG.getNode(AMDGPUISD::RCP, SL, VT, Y); in lowerFastUnsafeFDIV64()
10579 SDValue RcpSrc1 = DAG.getNode(AMDGPUISD::RCP, SL, MVT::f32, CvtSrc1); in LowerFDIV16()
10615 SDValue r0 = DAG.getNode(AMDGPUISD::RCP, SL, MVT::f32, r1, Flags); in lowerFDIV_FAST()
10658 SDValue ApproxRcp = DAG.getNode(AMDGPUISD::RCP, SL, MVT::f32, in LowerFDIV32()
10787 SDValue Rcp = DAG.getNode(AMDGPUISD::RCP, SL, MVT::f64, DivScale0); in LowerFDIV64()
12641 case AMDGPUISD::RCP: in isCanonicalized()
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H A DAMDGPUISelDAGToDAG.cpp177 case AMDGPUISD::RCP: in fp16SrcZerosHighBits()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrSSE.td3068 defm RCP : sse1_fp_unop_s<0x53, "rcp", X86frcp, SchedWriteFRcp, HasAVX>,