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Searched refs:RBX (Results 1 – 15 of 15) sorted by relevance

/freebsd/lib/libc/amd64/string/
H A Dstrncmp.S248 lea (%rsi, %rax, 1), %rbx # point RBX to offset in second string
337 shl %cl, %r8d # adjust NUL mask to positions in RDI/RBX
367 add %rdi, %rbx # turn RBX from offset into pointer
379 lea (%rdi, %rax, 1), %rbx # point RBX to offset in first string
456 shl %cl, %r8d # adjust NUL mask to positions in RSI/RBX
480 add %rsi, %rbx # turn RBX from offset into pointer
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallingConv.td718 CCAssignToReg<[R13, RBP, R12, RBX, R14, RSI, RDI, R8, R9, R15]>>,
1064 // - RBX base pointer
1142 def CSR_64 : CalleeSavedRegs<(add RBX, R12, R13, R14, R15, RBP)>;
1150 def CSR_Win64_NoSSE : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12, R13, R14, R15)>;
1183 def CSR_64_MostRegs : CalleeSavedRegs<(add RBX, RCX, RDX, RSI, RDI, R8, R9, R10,
1198 def CSR_64_AllRegs_NoSSE : CalleeSavedRegs<(add RAX, RBX, RCX, RDX, RSI, RDI, R8, R9,
1210 def CSR_Win64_Intel_OCL_BI_AVX : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12,
1214 def CSR_Win64_Intel_OCL_BI_AVX512 : CalleeSavedRegs<(add RBX, RBP, RDI, RSI,
1226 def CSR_64_Intel_OCL_BI_AVX512 : CalleeSavedRegs<(add RBX, RSI, R14, R15,
1236 def CSR_Win64_RegCall_NoSSE : CalleeSavedRegs<(add RBX, RBP,
[all …]
H A DX86RegisterInfo.td284 def RBX : X86Reg<"rbx", 3, [EBX]>, DwarfRegNum<[3, -2, -2]>;
534 // List call-clobbered registers before callee-save registers. RBX, RBP, (and
588 R30, R31, RBX, R14, R15, R12, R13, RBP, RSP, RIP)>;
594 RBX, R14, R15, R12, R13, RBP)>;
629 def GR64_ABCD : RegisterClass<"X86", [i64], 64, (add RAX, RCX, RDX, RBX)>;
653 (add RAX, RCX, RDX, RSI, RDI, RBX, RBP, RSP, RIP)>;
H A DX86ExpandPseudo.cpp440 TII->copyPhysReg(MBB, MBBI, DL, X86::RBX, InArg.getReg(), false); in expandMI()
447 TII->copyPhysReg(MBB, MBBI, DL, X86::RBX, SaveRbx, in expandMI()
549 TII->copyPhysReg(MBB, MBBI, DL, X86::RBX, SaveRbx, /*SrcIsKill*/ true); in expandMI()
H A DX86InstrSystem.td452 let Defs = [RAX, EFLAGS], Uses = [RBX, RCX], Predicates = [In64BitMode] in
666 let Defs = [RSI, RDI], Uses = [RBX, RDX, RSI, RDI] in {
768 let Uses = [RAX, RBX, RCX, RDX], Defs = [RAX, RBX, RCX] in {
838 // RBX/RCX/RDX: Leaf-specific purpose."
845 let Uses = [RAX, RBX, RCX, RDX], Defs = [RAX, RBX, RCX, RDX, EFLAGS] in
H A DX86InstrCompiler.td955 let Defs = [RAX, RDX, EFLAGS], Uses = [RAX, RBX, RCX, RDX],
963 // This pseudo must be used when the frame uses RBX as
964 // the base pointer. Indeed, in such situation RBX is a reserved
967 // RBX that will happen when setting the arguments for the instrucion.
970 // defines RBX (instead of using RBX).
971 // The rationale is that we will define RBX during the expansion of
972 // the pseudo. The argument feeding RBX is rbx_input.
975 // save the value of RBX across the actual instruction.
981 // the value of RBX.
982 let Defs = [RAX, RDX, RBX, EFLAGS], Uses = [RAX, RCX, RDX],
[all …]
H A DX86RegisterInfo.cpp70 BasePtr = Use64BitReg ? X86::RBX : X86::EBX; in X86RegisterInfo()
H A DX86InstrMisc.td954 let Defs = [RAX, RDX, EFLAGS], Uses = [RAX, RBX, RCX, RDX] in
H A DX86ISelLowering.cpp36811 (BasePtr == X86::RBX || BasePtr == X86::EBX)) { in EmitInstrWithCustomInserter()
36818 .addReg(X86::RBX); in EmitInstrWithCustomInserter()
36828 BuildMI(*BB, MI, MIMD, TII->get(TargetOpcode::COPY), X86::RBX) in EmitInstrWithCustomInserter()
36841 bool IsRBX = (BasePtr == X86::RBX || BasePtr == X86::EBX); in EmitInstrWithCustomInserter()
36867 .addReg(X86::RBX); in EmitInstrWithCustomInserter()
59180 case X86::RBX: in getRegForInlineAsmConstraint()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCTargetDesc.cpp257 {codeview::RegisterId::RBX, X86::RBX}, in initLLVMToSEHAndCVRegMapping()
783 SUB_SUPER(BL, BX, EBX, RBX, R) in getX86SubSuperRegister()
921 B_SUB_SUPER(RBX) in getX86SubSuperRegister()
H A DX86AsmBackend.cpp1187 case X86::RBX: in PushInstrSize()
1207 X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0 in getCompactUnwindRegNum()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/
H A DX86DisassemblerDecoder.h291 ENTRY(RBX) \
325 ENTRY(RBX) \
/freebsd/sys/amd64/amd64/
H A Dbpf_jit_machdep.h43 #define RBX 3 macro
/freebsd/contrib/llvm-project/lldb/source/Plugins/SymbolFile/NativePDB/
H A DCodeViewRegisterMapping.cpp712 case llvm::codeview::RegisterId::RBX: in GetRegisterSize()
/freebsd/contrib/llvm-project/llvm/include/llvm/DebugInfo/CodeView/
H A DCodeViewRegisters.def221 CV_REGISTER(RBX, 329)