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Searched refs:RAReg (Results 1 – 5 of 5) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/MC/
H A DMCDwarf.cpp1699 unsigned RAReg = Frame.RAReg; in EmitCIE() local
1700 if (RAReg == static_cast<unsigned>(INT_MAX)) in EmitCIE()
1701 RAReg = MRI->getDwarfRegNum(MRI->getRARegister(), IsEH); in EmitCIE()
1704 assert(RAReg <= 255 && in EmitCIE()
1706 Streamer.emitInt8(RAReg); in EmitCIE()
1708 Streamer.emitULEB128IntValue(RAReg); in EmitCIE()
1847 IsSimple(Frame.IsSimple), RAReg(Frame.RAReg), in CIEKey()
1859 IsSignalFrame, IsSimple, RAReg, IsBKeyFrame, in operator <()
1863 Other.IsSimple, Other.RAReg, Other.IsBKeyFrame, in operator <()
1872 RAReg == Other.RAReg && IsBKeyFrame == Other.IsBKeyFrame && in operator ==()
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H A DMCStreamer.cpp695 CurFrame->RAReg = Register; in emitCFIReturnColumn()
/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCRegisterInfo.h166 MCRegister RAReg; // Return address register variable
288 RAReg = RA; in InitMCRegisterInfo()
359 return RAReg; in getRARegister()
H A DMCDwarf.h783 unsigned RAReg = static_cast<unsigned>(INT_MAX); member
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVFrameLowering.cpp57 static constexpr MCPhysReg RAReg = RISCV::X1; variable
64 /*ra*/ RAReg, /*s0*/ FPReg, /*s1*/ RISCV::X9,
78 {/*ra*/ RAReg, -4},
117 CSI, [&](CalleeSavedInfo &CSR) { return CSR.getReg() == RAReg; })) in emitSCSPrologue()
122 BuildMI(MBB, MI, DL, TII->get(RISCV::SSPUSH)).addReg(RAReg); in emitSCSPrologue()
139 .addReg(RAReg) in emitSCSPrologue()
176 CSI, [&](CalleeSavedInfo &CSR) { return CSR.getReg() == RAReg; })) in emitSCSEpilogue()
181 BuildMI(MBB, MI, DL, TII->get(RISCV::SSPOPCHK)).addReg(RAReg); in emitSCSEpilogue()
193 .addReg(RAReg, RegState::Define) in emitSCSEpilogue()
386 case /*ra*/ RAReg: return 0; in getLibCallID()
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