| /freebsd/contrib/llvm-project/lldb/source/Plugins/Process/gdb-remote/ |
| H A D | GDBRemoteRegisterFallback.cpp | 21 #define R32(name) REG(name, 4) macro
33 R64(x28), R64(x29), R64(x30), R64(sp), R64(pc), R32(cpsr), in GetRegisters_aarch64()
56 R32(eax), R32(ecx), R32(edx), R32(ebx), R32(esp), R32(ebp), in GetRegisters_x86()
57 R32(esi), R32(edi), R32(eip), R32(eflags), R32(cs), R32(ss), in GetRegisters_x86()
58 R32(ds), R32(es), R32(fs), R32(gs), in GetRegisters_x86()
71 R64(r12), R64(r13), R64(r14), R64(r15), R64(rip), R32(eflags), in GetRegisters_x86_64()
72 R32(cs), R32(ss), R32(ds), R32(es), R32(fs), R32(gs), in GetRegisters_x86_64()
78 #undef R32
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonTfrCleanup.cpp | 73 void setReg(unsigned R32, uint32_t V32, ImmediateMap &IMap);
94 void HexagonTfrCleanup::setReg(unsigned R32, uint32_t V32, ImmediateMap &IMap) { in setReg() argument
95 ImmediateMap::iterator F = IMap.find(R32); in setReg()
97 IMap.insert(std::make_pair(R32, V32)); in setReg()
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| H A D | HexagonGenInsert.cpp | 1397 bool R32 = MRI->getRegClass(NewR) == &Hexagon::IntRegsRegClass; in generateInserts() local
1398 const MCInstrDesc &D = R32 ? HII->get(Hexagon::S2_insert) in generateInserts()
1403 if (R32 && MRI->getRegClass(IF.InsR) == &Hexagon::DoubleRegsRegClass) { in generateInserts()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCRegisterInfo.td | 53 // Define extended core registers R32..R63
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYRegisterInfo.td | 86 def R32 : CSKYReg<32, "r32", ["r32"]>, DwarfRegNum<[32]>;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | Target.td | 865 /// (outs R32:$dst), (ins R32:$src1, R32:$src2) or something similar.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZScheduleZEC12.td | 751 def : InstRW<[WLat1, FXU, NormalGr], (instregex "LD(R|R32|GR)$")>;
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| H A D | SystemZScheduleZ196.td | 713 def : InstRW<[WLat1, FXU, NormalGr], (instregex "LD(R|R32|GR)$")>;
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| H A D | SystemZScheduleZ13.td | 781 def : InstRW<[WLat1, FXb, NormalGr], (instregex "LD(R|R32|GR)$")>;
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| H A D | SystemZScheduleZ14.td | 801 def : InstRW<[WLat1, FXb, NormalGr], (instregex "LD(R|R32|GR)$")>;
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| H A D | SystemZScheduleZ15.td | 819 def : InstRW<[WLat1, FXb, NormalGr], (instregex "LD(R|R32|GR)$")>;
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| H A D | SystemZScheduleZ16.td | 820 def : InstRW<[WLat1, FXb, NormalGr], (instregex "LD(R|R32|GR)$")>;
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