/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZFrameLowering.cpp | 43 { SystemZ::R15D, 0x78 }, 54 {SystemZ::R13D, 0x48}, {SystemZ::R14D, 0x50}, {SystemZ::R15D, 0x58}}; 173 unsigned HighGPR = SystemZ::R15D; in assignCalleeSavedSpillSlots() 273 SavedRegs.set(SystemZ::R15D); in determineCalleeSaves() 340 MIB.addReg(SystemZ::R15D).addImm(SpillGPRs.GPROffset); in spillCalleeSavedRegisters() 415 MIB.addReg(HasFP ? SystemZ::R11D : SystemZ::R15D); in restoreCalleeSavedRegisters() 625 .addReg(SystemZ::R1D, RegState::Define).addReg(SystemZ::R15D); in emitPrologue() 626 emitIncrement(MBB, MBBI, DL, SystemZ::R15D, Delta, ZII); in emitPrologue() 630 .addReg(SystemZ::R1D, RegState::Kill).addReg(SystemZ::R15D) in emitPrologue() 639 .addReg(SystemZ::R15D); in emitPrologue() [all …]
|
H A D | SystemZRegisterInfo.h | 113 int getStackPointerRegister() final { return SystemZ::R15D; }; in getStackPointerRegister()
|
H A D | SystemZISelLowering.cpp | 1388 .Case("r15", Subtarget.isTargetELF() ? SystemZ::R15D : 0) in getRegisterByName() 9447 BuildMI(MBB, DL, TII->get(SystemZ::SLGFI), SystemZ::R15D) in emitProbedAlloca() 9448 .addReg(SystemZ::R15D) in emitProbedAlloca() 9450 BuildMI(MBB, DL, TII->get(SystemZ::CG)).addReg(SystemZ::R15D) in emitProbedAlloca() 9451 .addReg(SystemZ::R15D).addImm(ProbeSize - 8).addReg(0) in emitProbedAlloca() 9472 BuildMI(MBB, DL, TII->get(SystemZ::SLGR), SystemZ::R15D) in emitProbedAlloca() 9473 .addReg(SystemZ::R15D) in emitProbedAlloca() 9475 BuildMI(MBB, DL, TII->get(SystemZ::CG)).addReg(SystemZ::R15D) in emitProbedAlloca() 9476 .addReg(SystemZ::R15D).addImm(-8).addReg(PHIReg) in emitProbedAlloca() 9483 .addReg(SystemZ::R15D); in emitProbedAlloca()
|
H A D | SystemZInstrInfo.td | 35 let Defs = [R15D, CC], Uses = [R15D], hasNoSchedulingInfo = 1, 41 let Defs = [R1D, R15D, CC], Uses = [R15D], hasNoSchedulingInfo = 1,
|
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/ |
H A D | SystemZMCTargetDesc.cpp | 53 SystemZ::R12D, SystemZ::R13D, SystemZ::R14D, SystemZ::R15D 161 nullptr, MRI.getDwarfRegNum(SystemZ::R15D, true), in createSystemZMCAsmInfo()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/ |
H A D | X86DisassemblerDecoder.h | 235 ENTRY(R15D) \ 269 ENTRY(R15D) \
|
/freebsd/sys/amd64/amd64/ |
H A D | bpf_jit_machdep.h | 72 #define R15D 7 macro
|
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86RegisterInfo.td | 255 def R15D : X86Reg<"r15d", 15, [R15W,R15WH]>; 298 def R15 : X86Reg<"r15", 15, [R15D]>, DwarfRegNum<[15, -2, -2]>; 578 R14D, R15D, R12D, R13D)>;
|
H A D | X86CallingConv.td | 89 let GPR_32 = [EAX, ECX, EDX, EDI, ESI, R8D, R9D, R10D, R11D, R12D, R14D, R15D]; 101 let GPR_32 = [EAX, ECX, EDX, EDI, ESI, R8D, R9D, R11D, R12D, R14D, R15D]; 108 let GPR_32 = [EAX, ECX, EDX, EDI, ESI, R8D, R9D, R12D, R13D, R14D, R15D]; 1068 CCIfType<[i32], CCAssignToReg<[R12D, R13D, R14D, R15D, EDI, ESI,
|
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86MCTargetDesc.cpp | 295 {codeview::RegisterId::R15D, X86::R15D}, in initLLVMToSEHAndCVRegMapping()
|
H A D | X86BaseInfo.h | 1219 case X86::R15D: in isX86_64ExtendedReg()
|
/freebsd/contrib/llvm-project/lldb/source/Plugins/SymbolFile/NativePDB/ |
H A D | CodeViewRegisterMapping.cpp | 709 case llvm::codeview::RegisterId::R15D: in GetRegisterSize()
|
/freebsd/contrib/llvm-project/llvm/include/llvm/DebugInfo/CodeView/ |
H A D | CodeViewRegisters.def | 263 CV_REGISTER(R15D, 367)
|