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Searched refs:Queues (Results 1 – 20 of 20) sorted by relevance

/freebsd/sys/dev/cxgbe/firmware/
H A Dt5fw_cfg_fpga.txt22 # 2. Ingress Queues with Free Lists: 1024. PCI-E SR-IOV Virtual Functions
23 # must use a power of 2 Ingress Queues.
24 # 3. Egress Queues: 128K. PCI-E SR-IOV Virtual Functions must use a
25 # power of 2 Egress Queues.
54 # Ingress Queues and MSI-X Vectors to allow up to some number of CPUs
64 # for a total of 96 Ingress Queues and MSI-X Vectors on the Unified PF.
65 # (Plus a few for Firmware Event Queues, etc.)
187 # Each Ingress Queue can use one MSI-X interrupt but some Ingress Queues can
188 # use Forwarded Interrupt Ingress Queues. For these latter, an Ingress Queue
192 # than or equal to the number of Ingress Queues ...
[all …]
H A Dt4fw_cfg_uwire.txt22 # 2. Ingress Queues with Free Lists: 1024. PCI-E SR-IOV Virtual Functions
23 # must use a power of 2 Ingress Queues.
24 # 3. Egress Queues: 128K. PCI-E SR-IOV Virtual Functions must use a
25 # power of 2 Egress Queues.
54 # Ingress Queues and MSI-X Vectors to allow up to some number of CPUs
64 # for a total of 96 Ingress Queues and MSI-X Vectors on the Unified PF.
65 # (Plus a few for Firmware Event Queues, etc.)
170 # Each Ingress Queue can use one MSI-X interrupt but some Ingress Queues can
171 # use Forwarded Interrupt Ingress Queues. For these latter, an Ingress Queue
175 # than or equal to the number of Ingress Queues ...
[all …]
H A Dt5fw_cfg_uwire.txt23 # 2. Ingress Queues with Free Lists: 1024.
24 # 3. Egress Queues: 128K.
39 # Ingress Queues and MSI-X Vectors to allow up to some number of CPUs
49 # for a total of 96 Ingress Queues and MSI-X Vectors on the Unified PF.
50 # (Plus a few for Firmware Event Queues, etc.)
205 # Each Ingress Queue can use one MSI-X interrupt but some Ingress Queues can
206 # use Forwarded Interrupt Ingress Queues. For these latter, an Ingress Queue
210 # than or equal to the number of Ingress Queues ...
213 # NFLIQ_NIC = 32 # NIC Ingress Queues with Free Lists
214 # NETHCTRL_NIC = 32 # NIC Ethernet Control/TX Queues
[all …]
H A Dt6fw_cfg_fpga.txt23 # 2. Ingress Queues with Free Lists: 1024.
24 # 3. Egress Queues: 128K.
39 # Ingress Queues and MSI-X Vectors to allow up to some number of CPUs
49 # for a total of 96 Ingress Queues and MSI-X Vectors on the Unified PF.
50 # (Plus a few for Firmware Event Queues, etc.)
199 # Each Ingress Queue can use one MSI-X interrupt but some Ingress Queues can
200 # use Forwarded Interrupt Ingress Queues. For these latter, an Ingress Queue
204 # than or equal to the number of Ingress Queues ...
207 # NFLIQ_NIC = 32 # NIC Ingress Queues with Free Lists
208 # NETHCTRL_NIC = 32 # NIC Ethernet Control/TX Queues
[all …]
H A Dt6fw_cfg_uwire.txt23 # 2. Ingress Queues with Free Lists: 1024.
24 # 3. Egress Queues: 128K.
39 # Ingress Queues and MSI-X Vectors to allow up to some number of CPUs
49 # for a total of 96 Ingress Queues and MSI-X Vectors on the Unified PF.
50 # (Plus a few for Firmware Event Queues, etc.)
222 # Each Ingress Queue can use one MSI-X interrupt but some Ingress Queues can
223 # use Forwarded Interrupt Ingress Queues. For these latter, an Ingress Queue
227 # than or equal to the number of Ingress Queues ...
230 # NFLIQ_NIC = 32 # NIC Ingress Queues with Free Lists
231 # NETHCTRL_NIC = 32 # NIC Ethernet Control/TX Queues
[all …]
H A Dt4fw_cfg.txt158 # and GTS registers, the number of Ingress and Egress Queues must be a power
H A Dt6fw_cfg_hashfilter.txt187 # and GTS registers, the number of Ingress and Egress Queues must be a power
H A Dt5fw_cfg.txt203 # and GTS registers, the number of Ingress and Egress Queues must be a power
H A Dt5fw_cfg_hashfilter.txt206 # and GTS registers, the number of Ingress and Egress Queues must be a power
H A Dt6fw_cfg.txt205 # and GTS registers, the number of Ingress and Egress Queues must be a power
/freebsd/contrib/llvm-project/lldb/source/Target/
H A DQueueList.cpp49 for (QueueSP queue_sp : Queues()) { in FindQueueByID()
60 for (QueueSP queue_sp : Queues()) { in FindQueueByIndexID()
/freebsd/contrib/llvm-project/lldb/include/lldb/Target/
H A DQueueList.h60 QueueIterable Queues() { return QueueIterable(m_queues, m_mutex); } in Queues() function
H A DProcess.h2251 QueueList::QueueIterable Queues() { in Queues() function
2253 return m_queue_list.Queues(); in Queues()
/freebsd/tools/test/stress2/misc/
H A Dall.exclude51 sctp2.sh panic: Queues are not empty when handling SHUTDOWN-COMPLETE 20210211
52 sctp3.sh panic: Queues are not empty when handling SHUTDOWN-COMPLETE 20210211
/freebsd/sys/contrib/device-tree/Bindings/soc/ti/
H A Dk3-ringacc.txt22 "fifos" - The RA Queues Registers
/freebsd/contrib/llvm-project/clang/lib/Parse/
H A DParseOpenACC.cpp179 Queues, enumerator
200 case OpenACCSpecialTokenKind::Queues: in isOpenACCSpecialToken()
1190 if (isOpenACCSpecialToken(OpenACCSpecialTokenKind::Queues, Tok) && in ParseOpenACCWaitArgument()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenSchedule.cpp493 RecVec Queues = Records.getAllDerivedDefinitions("MemoryQueue"); in collectLoadStoreQueueInfo() local
495 for (Record *Queue : Queues) { in collectLoadStoreQueueInfo()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DP9InstrResources.td29 // - Four Load/Store Queues. P9_LS_*
/freebsd/contrib/one-true-awk/testdir/
H A Dfunstack.ok2742 J. L. W. Kessels Alternative to Event Queues for
2994 Priority Queues . . . . . . . . . . . . 309--315
H A Dfunstack.in20892 title = "Alternative to Event Queues for Synchronization in Monitors",
22806 title = "A Data Structure for Manipulating Priority Queues",