| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstrMVE.td | 318 def : Pat<(VTI.Vec (Op (VTI.Vec MQPR:$Qm), (VTI.Vec MQPR:$Qn))),
319 (VTI.Vec (Inst (VTI.Vec MQPR:$Qm), (VTI.Vec MQPR:$Qn)))>;
324 (VTI.Vec (Op (VTI.Vec MQPR:$Qm),
327 (VTI.Vec (Inst (VTI.Vec MQPR:$Qm), (VTI.Vec MQPR:$Qn),
332 def : Pat<(VTI.Vec (Op (VTI.Vec MQPR:$Qm),
336 (VTI.Vec (Inst (VTI.Vec MQPR:$Qm), (VTI.Vec MQPR:$Qn),
338 (VTI.Vec MQPR:$Qm)))>;
342 def : Pat<(VTI.Vec !con((PredInt (VTI.Vec MQPR:$Qm), (VTI.Vec MQPR:$Qn)),
345 (VTI.Vec (Inst (VTI.Vec MQPR:$Qm), (VTI.Vec MQPR:$Qn),
354 def : Pat<(VTI.Vec (Op (VTI.Vec MQPR:$Qm), (VT
[all...] |
| H A D | ARMInstrCDE.td | 333 iname#"${vp}\t$coproc, $Qd, $Qm, $imm", params.Cstr,
337 bits<3> Qm;
349 let Inst{3-1} = Qm{2-0};
400 iname#"${vp}\t$coproc, $Qd, $Qn, $Qm, $imm", params.Cstr,
404 bits<3> Qm;
418 let Inst{3-1} = Qm{2-0};
484 let Rm = (ins regclass:$Qm);
|
| H A D | ARMInstrNEON.td | 6919 def : NEONInstAlias<"vcvt${p}.s32.f32 $Qd, $Qm, #0",
6920 (VCVTf2sq QPR:$Qd, QPR:$Qm, pred:$p)>;
6921 def : NEONInstAlias<"vcvt${p}.u32.f32 $Qd, $Qm, #0",
6922 (VCVTf2uq QPR:$Qd, QPR:$Qm, pred:$p)>;
6923 def : NEONInstAlias<"vcvt${p}.f32.s32 $Qd, $Qm, #0",
6924 (VCVTs2fq QPR:$Qd, QPR:$Qm, pred:$p)>;
6925 def : NEONInstAlias<"vcvt${p}.f32.u32 $Qd, $Qm, #0",
6926 (VCVTu2fq QPR:$Qd, QPR:$Qm, pred:$p)>;
6937 def : NEONInstAlias<"vcvt${p}.s16.f16 $Qd, $Qm, #0",
6938 (VCVTh2sq QPR:$Qd, QPR:$Qm, pred:$p)>;
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 1054 // {2-0} Qm in getT2ScaledImmOpValue()
1059 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M1.getReg());
1061 assert(Qm < 8 && "Qm is supposed to be encodable in 3 bits"); in getMveAddrModeRQOpValue()
1063 return (Rn << 3) | Qm; in getMveAddrModeRQOpValue()
1073 // {10-8} Qm in getMveAddrModeRQOpValue()
1078 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M0.getReg());
1093 assert(Qm < 8 && "Qm is supposed to be encodable in 3 bits"); in getMveAddrModeQOpValue()
1095 return (Qm << in getMveAddrModeQOpValue()
1070 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M1.getReg()); getMveAddrModeRQOpValue() local
1089 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M0.getReg()); getMveAddrModeQOpValue() local
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 3839 unsigned Qm = fieldFromInstruction(Insn, 1, 3); in DecodeMVEVADCInstruction() local
3840 Qm |= fieldFromInstruction(Insn, 5, 1) << 3; in DecodeMVEVADCInstruction()
3841 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qm, Address, Decoder))) in DecodeMVEVADCInstruction()
4756 unsigned Qm = fieldFromInstruction(Insn, 0, 3); in DecodeMveAddrModeRQ() local
4760 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qm, Address, Decoder))) in DecodeMveAddrModeRQ()
4771 unsigned Qm = fieldFromInstruction(Insn, 8, 3); in DecodeMveAddrModeQ() local
4774 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qm, Address, Decoder))) in DecodeMveAddrModeQ()
6931 unsigned Qm = ((fieldFromInstruction(Insn, 5, 1) << 3) | in DecodeMVEVCVTt1fp() local
6937 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qm, Address, Decoder))) in DecodeMVEVCVTt1fp()
6967 unsigned Qm = fieldFromInstruction(Insn, 5, 1) << 4 | in DecodeMVEVCMP() local
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 8026 const unsigned Qm = MRI->getEncodingValue(Inst.getOperand(QmIdx).getReg()); in validateInstruction() local
8028 if (Qd == Qm) { in validateInstruction()
|
| /freebsd/contrib/sendmail/ |
| H A D | PGPKEYS | 774 7Qm+ROSSIQuGwZEzWliRlJVouZ6gMkfuhoxyYaxOCceIBWBgzZ6cbXnneRvtap7E
|
| /freebsd/crypto/openssl/test/recipes/30-test_evp_data/ |
| H A D | evppkey_kas.txt | 3469 BPyLpGybZjNOOvknyL77QwcQTymazsTjD4Etk0XJcg0Zhp2//9TKPn0nE+tfw/Qm
|