| /freebsd/contrib/arm-optimized-routines/pl/math/ |
| H A D | erfc_1u8.c | 29 #define Q9 0x1.1c71c71c71c72p0 macro
111 double p10 = fma (Q9 * r, p9, p8) * R9; in erfc()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64PBQPRegAlloc.cpp | 76 case AArch64::Q9: in isOdd()
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| H A D | AArch64RegisterInfo.td | 427 def Q9 : AArch64Reg<9, "q9", [D9], ["v9", ""]>, DwarfRegAlias<B9>;
867 def Z9 : AArch64Reg<9, "z9", [Q9]>, DwarfRegNum<[105]>;
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| /freebsd/secure/caroot/trusted/ |
| H A D | BJCA_Global_Root_CA1.pem | 131 znfSxqxx4VyjHQy7Ct9f4qNx2No3WqB4K/TUfet27fJhcKVlmtOJNBir+3I+17Q9
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/ |
| H A D | SparcDisassembler.cpp | 92 SP::Q1, SP::Q9, ~0U, ~0U,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCTargetDesc.cpp | 321 {codeview::RegisterId::ARM_NQ9, ARM::Q9}, in initLLVMToCVRegMapping()
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| H A D | ARMMCCodeEmitter.cpp | 563 case ARM::Q8: case ARM::Q9: case ARM::Q10: case ARM::Q11: in getMachineOpValue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcRegisterInfo.td | 290 def Q9 : Rq< 5, "f36", [D18, D19]>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCTargetDesc.cpp | 214 {codeview::RegisterId::ARM64_Q9, AArch64::Q9}, in initLLVMToCVRegMapping()
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| H A D | AArch64InstPrinter.cpp | 1520 case AArch64::Q8: Reg = AArch64::Q9; break; in getNextVectorRegister()
1521 case AArch64::Q9: Reg = AArch64::Q10; break; in getNextVectorRegister()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/Disassembler/ |
| H A D | VEDisassembler.cpp | 94 VE::Q8, VE::Q9, VE::Q10, VE::Q11, VE::Q12, VE::Q13, VE::Q14, VE::Q15,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/AsmParser/ |
| H A D | VEAsmParser.cpp | 127 VE::Q8, VE::Q9, VE::Q10, VE::Q11, VE::Q12, VE::Q13, VE::Q14, VE::Q15,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 182 Sparc::Q8, Sparc::Q9, Sparc::Q10, Sparc::Q11,
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMRegisterInfo.td | 170 def Q9 : ARMReg< 9, "q9", [D18, D19]>;
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| H A D | ARMInstrThumb2.td | 3900 Q0, Q1, Q2, Q3, Q8, Q9, Q10, Q11, Q12, Q13, Q14, Q15],
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| H A D | ARMInstrInfo.td | 5943 Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8, Q9, Q10, Q11, Q12, Q13, Q14, Q15 ],
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 1574 ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11,
1594 ARM::Q9, ARM::D19_D20, ARM::Q10, ARM::D21_D22, ARM::Q11, ARM::D23_D24,
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| /freebsd/contrib/ncurses/include/ |
| H A D | Caps.hpux11 | 836 exit_left_hl_mode rmlhlm str Q9 - - ----K Exit left highlight mode
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 2647 .Case("v9", AArch64::Q9) in MatchNeonVectorRegName()
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| /freebsd/crypto/openssl/test/recipes/30-test_evp_data/ |
| H A D | evppkey_kas.txt | 11480 scOtDTUif4Z+Q9+ciRfc6fjB7zujy1youlI=
|