| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | LexicalScopes.cpp | 75 const MachineInstr *PrevMI = nullptr; in extractLexicalScopes() local
86 PrevMI = &MInsn; in extractLexicalScopes()
92 PrevMI = &MInsn; in extractLexicalScopes()
100 InsnRange R(RangeBeginMI, PrevMI); in extractLexicalScopes()
109 PrevMI = &MInsn; in extractLexicalScopes()
114 if (RangeBeginMI && PrevMI && PrevDL) { in extractLexicalScopes()
115 InsnRange R(RangeBeginMI, PrevMI); in extractLexicalScopes()
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| H A D | ImplicitNullChecks.cpp | 180 /// \p PrevMI, AR_MayAlias if they may alias and AR_WillAliasEverything if
181 /// they may alias and any further memory operation may alias with \p PrevMI.
183 const MachineInstr *PrevMI) const;
330 const MachineInstr *PrevMI) const { in areMemoryOpsAliased()
332 if (!(PrevMI->mayStore() || PrevMI->mayLoad())) in areMemoryOpsAliased()
335 if (!(MI.mayStore() || PrevMI->mayStore())) in areMemoryOpsAliased()
341 if (PrevMI->memoperands_empty()) in areMemoryOpsAliased()
342 return PrevMI->mayStore() ? AR_WillAliasEverything : AR_MayAlias; in areMemoryOpsAliased()
348 for (MachineMemOperand *MMO2 : PrevMI in areMemoryOpsAliased()
469 for (auto *PrevMI : PrevInsts) { isSuitableMemoryOp() local
[all...] |
| H A D | TwoAddressInstructionPass.cpp | 1620 MachineBasicBlock::iterator PrevMI = MI; in processTiedPairs() local
1621 --PrevMI; in processTiedPairs()
1622 DistanceMap.insert(std::make_pair(&*PrevMI, Dist)); in processTiedPairs()
1626 LastCopyIdx = LIS->InsertMachineInstrInMaps(*PrevMI).getRegSlot(); in processTiedPairs()
1690 MachineBasicBlock::iterator PrevMI = MI; in processTiedPairs() local
1691 --PrevMI; in processTiedPairs()
1692 LV->addVirtualRegisterKilled(RegB, *PrevMI); in processTiedPairs()
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| H A D | MachineLICM.cpp | 1493 for (MachineInstr *PrevMI : PrevMIs) in LookForDuplicate()
1494 if (TII->produceSameValue(*MI, *PrevMI, (PreRegAlloc ? MRI : nullptr))) in LookForDuplicate()
1495 return PrevMI; in LookForDuplicate()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | AntiDepBreaker.h | 81 MachineInstr *PrevMI = DV.second; in UpdateDbgValues()
82 if ((PrevMI == ParentMI) || (PrevMI == PrevDbgMI)) { in UpdateDbgValues() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInsertVSETVLI.cpp | 919 bool canMutatePriorConfig(const MachineInstr &PrevMI, const MachineInstr &MI,
1605 const MachineInstr &PrevMI, const MachineInstr &MI, in canMutatePriorConfig() argument
1615 if (isVLPreservingConfig(PrevMI)) in canMutatePriorConfig()
1617 if (!getInfoForVSETVLI(PrevMI).hasEquallyZeroAVL(getInfoForVSETVLI(MI), in canMutatePriorConfig()
1623 auto &PrevAVL = PrevMI.getOperand(1); in canMutatePriorConfig()
1633 assert(PrevMI.getOperand(2).isImm() && MI.getOperand(2).isImm()); in canMutatePriorConfig()
1634 auto PriorVType = PrevMI.getOperand(2).getImm(); in canMutatePriorConfig()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizationArtifactCombiner.h | 1445 MachineInstr *PrevMI = &MI; variable
1446 while (PrevMI != &DefMI) {
1447 Register PrevRegSrc = getArtifactSrcReg(*PrevMI);
1461 PrevMI = TmpDef;
1464 if (PrevMI == &DefMI) {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIWholeQuadMode.cpp | 647 if (MachineInstr *PrevMI = MI.getPrevNode()) { in propagateInstruction() local
649 if (!PrevMI->isPHI()) { in propagateInstruction()
650 InstrInfo &PrevII = Instructions[PrevMI]; in propagateInstruction()
653 Worklist.emplace_back(PrevMI); in propagateInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FloatingPoint.cpp | 438 MachineInstr *PrevMI = nullptr; in processBasicBlock() local
440 PrevMI = &*std::prev(I); in processBasicBlock()
477 MachineBasicBlock::iterator PrevI = PrevMI; in processBasicBlock()
492 (void)PrevMI; in processBasicBlock()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 2051 MachineInstr &PrevMI = *PrevI; in MergeReturnIntoLDM() local
2052 unsigned Opcode = PrevMI.getOpcode(); in MergeReturnIntoLDM()
2056 MachineOperand &MO = PrevMI.getOperand(PrevMI.getNumOperands() - 1); in MergeReturnIntoLDM()
2062 PrevMI.setDesc(TII->get(NewOpc)); in MergeReturnIntoLDM()
2064 PrevMI.copyImplicitOps(*MBB.getParent(), *MBBI); in MergeReturnIntoLDM()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 992 MachineInstr &PrevMI = *std::prev(MBBI); in expandRestoreZA() local
993 MachineBasicBlock *SMBB = MBB.splitAt(PrevMI, /*UpdateLiveIns*/ true); in expandRestoreZA()
1091 MachineInstr &PrevMI = *std::prev(MBBI); in expandCondSMToggle() local
1092 MachineBasicBlock *SMBB = MBB.splitAt(PrevMI, /*UpdateLiveIns*/ true); in expandCondSMToggle()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/MIRParser/ |
| H A D | MIParser.cpp | 962 MachineInstr *PrevMI = nullptr; in parseBasicBlock() local
979 PrevMI->setFlag(MachineInstr::BundledSucc); in parseBasicBlock()
982 PrevMI = MI; in parseBasicBlock()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 5785 MachineInstr *PrevMI = ScalarToVec; in selectBuildVector() local
5792 PrevMI = &*emitLaneInsert(std::nullopt, DstVec, OpReg, i - 1, RB, MIB); in selectBuildVector()
5793 DstVec = PrevMI->getOperand(0).getReg(); in selectBuildVector()
5839 PrevMI->getOperand(0).setReg(I.getOperand(0).getReg()); in selectBuildVector()
5840 constrainSelectedInstRegOperands(*PrevMI, TII, TRI, RBI); in selectBuildVector()
5842 Register DstReg = PrevMI->getOperand(0).getReg(); in selectBuildVector()
5843 if (PrevMI == ScalarToVec && DstReg.isVirtual()) { in selectBuildVector()
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