Searched refs:PrefReg (Results 1 – 4 of 4) sorted by relevance
801 void setRegAllocationHint(Register VReg, unsigned Type, Register PrefReg) { in setRegAllocationHint() argument807 Hint.second.push_back(PrefReg); in setRegAllocationHint()812 void addRegAllocationHint(Register VReg, Register PrefReg) { in addRegAllocationHint() argument815 RegAllocHints[VReg].second.push_back(PrefReg); in addRegAllocationHint()820 void setSimpleHint(Register VReg, Register PrefReg) { in setSimpleHint() argument821 setRegAllocationHint(VReg, /*Type=*/0, PrefReg); in setSimpleHint()
83 PrefReg, ///< Block entry/exit prefers a register. enumerator
137 case PrefReg: in addBias()413 case PrefReg: return "PrefReg"; in print()
748 BC.Entry = BI.LiveIn ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()751 ? SpillPlacement::PrefReg in addSplitConstraints()1017 Ins += RegIn != (BC.Entry == SpillPlacement::PrefReg); in calcGlobalSplitCost()1019 Ins += RegOut != (BC.Exit == SpillPlacement::PrefReg); in calcGlobalSplitCost()