Searched refs:PrefReg (Results 1 – 4 of 4) sorted by relevance
802 void setRegAllocationHint(Register VReg, unsigned Type, Register PrefReg) { in setRegAllocationHint() argument806 RegAllocHints[VReg].second.push_back(PrefReg); in setRegAllocationHint()811 void addRegAllocationHint(Register VReg, Register PrefReg) { in addRegAllocationHint() argument813 RegAllocHints[VReg].second.push_back(PrefReg); in addRegAllocationHint()818 void setSimpleHint(Register VReg, Register PrefReg) { in setSimpleHint() argument819 setRegAllocationHint(VReg, /*Type=*/0, PrefReg); in setSimpleHint()
137 case PrefReg: in addBias()381 case PrefReg: return "PrefReg"; in print()
80 PrefReg, ///< Block entry/exit prefers a register.82 PrefReg, ///< Block entry/exit prefers a register. global() enumerator
614 BC.Entry = BI.LiveIn ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()617 ? SpillPlacement::PrefReg in addSplitConstraints()883 Ins += RegIn != (BC.Entry == SpillPlacement::PrefReg); in calcGlobalSplitCost()885 Ins += RegOut != (BC.Exit == SpillPlacement::PrefReg); in calcGlobalSplitCost()