| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.td | 533 let Name = "RegGPRC"; let PredicateMethod = "isRegNumber"; 539 let Name = "RegG8RC"; let PredicateMethod = "isRegNumber"; 545 let Name = "RegG8pRC"; let PredicateMethod = "isEvenRegNumber"; 551 let Name = "RegGPRCNoR0"; let PredicateMethod = "isRegNumber"; 557 let Name = "RegG8RCNoX0"; let PredicateMethod = "isRegNumber"; 563 let Name = "RegF8RC"; let PredicateMethod = "isRegNumber"; 569 let Name = "RegF4RC"; let PredicateMethod = "isRegNumber"; 575 let Name = "RegFpRC"; let PredicateMethod = "isEvenRegNumber"; 581 let Name = "RegVRRC"; let PredicateMethod = "isRegNumber"; 587 let Name = "RegVFRC"; let PredicateMethod = "isRegNumber"; [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsRegisterInfo.td | 511 let PredicateMethod = "isGPRAsmReg"; 516 let PredicateMethod = "isGPRZeroAsmReg"; 521 let PredicateMethod = "isGPRNonZeroAsmReg"; 526 let PredicateMethod = "isGPRAsmReg"; 531 let PredicateMethod = "isMM16AsmReg"; 536 let PredicateMethod = "isMM16AsmRegZero"; 541 let PredicateMethod = "isMM16AsmRegMoveP"; 546 let PredicateMethod = "isMM16AsmRegMovePPairFirst"; 551 let PredicateMethod = "isMM16AsmRegMovePPairSecond"; 556 let PredicateMethod = "isACCAsmReg"; [all …]
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| H A D | MipsInstrInfo.td | 574 let PredicateMethod = "isConstantSImm<" # Bits # ", " # Offset # ">"; 583 let PredicateMethod = "isScaledSImm<" # Bits # ", " # Shift # ">"; 592 let PredicateMethod = "isConstantUImm<" # Bits # ", " # Offset # ">"; 602 let PredicateMethod = "isConstantUImmRange<" # Bottom # ", " # Top # ">"; 611 let PredicateMethod = "isSImm<" # Bits # ">"; 620 let PredicateMethod = "isUImm<" # Bits # ">"; 630 let PredicateMethod = "isSImm<" # Bits # ">"; 666 let PredicateMethod = "isAnyImm<33>"; 678 let PredicateMethod = "isScaledSImm<19, 2>"; 685 let PredicateMethod = "isAnyImm<16>"; [all …]
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| H A D | MicroMipsInstrInfo.td | 57 let PredicateMethod = "isMemWithGRPMM16Base"; 89 let PredicateMethod = "isMemWithUimmWordAlignedOffsetSP<7>"; 96 let PredicateMethod = "isMemWithSimmWordAlignedOffsetGP<9>"; 153 let PredicateMethod = "isMemWithUimmOffsetSP<6>"; 534 let PredicateMethod = "isRegList16";
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoZclsd.td | 21 let PredicateMethod = "isGPRPairNoX0"; 32 let PredicateMethod = "isGPRPairC";
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| H A D | RISCVInstrInfoZa.td | 24 let PredicateMethod = "isGPRPair"; 31 let PredicateMethod = "isGPRPair";
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| H A D | RISCVInstrInfoZc.td | 49 let PredicateMethod = "isStackAdj"; 57 let PredicateMethod = "isStackAdj";
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| H A D | RISCVInstrInfoD.td | 39 let PredicateMethod = "isGPRPairAsFPR64"; 45 let PredicateMethod = "isGPRAsFPR";
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| H A D | RISCVInstrInfoC.td | 224 let PredicateMethod = "isImm"; 750 let PredicateMethod = "isAnyRegC";
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| H A D | RISCVInstrInfo.td | 203 let PredicateMethod = "isGPR"; 232 let PredicateMethod = "isBareSimmNLsb0<" # width # ">"; 312 let PredicateMethod = "isImm"; 1224 let PredicateMethod = "isAnyReg";
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| H A D | RISCVInstrInfoXqci.td | 163 let PredicateMethod = "isBareSimmN<" # width # ">"; 1789 let PredicateMethod = "isBareSymbol";
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.td | 231 let PredicateMethod = "isGPR64<AArch64::GPR64spRegClassID>"; 600 let PredicateMethod = "isNeonVectorReg"; 604 let PredicateMethod = "isNeonVectorReg"; 617 let PredicateMethod = "isNeonVectorRegLo"; 628 let PredicateMethod = "isNeonVectorReg0to7"; 639 let PredicateMethod 652 let PredicateMethod = "isImplicitlyTypedVectorList<RegKind::NeonVector, " # count # ">"; 662 let PredicateMethod = "isImplicitlyTypedVectorList<RegKind::NeonVector, " # count # ">"; 673 let PredicateMethod = "isImplicitlyTypedVectorList<RegKind::NeonVector, " # count # ", true>"; 767 let PredicateMethod = "isGPR64<AArch64::" # RC # "RegClassID>"; [all …]
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| H A D | AArch64InstrFormats.td | 216 let PredicateMethod = "isArithmeticShifter<" # width # ">"; 228 let PredicateMethod = "isLogicalShifter<" # width # ">"; 314 let PredicateMethod = "isUImmScaled<" # Width # ", " # Scale # ">"; 321 let PredicateMethod = "isSImmScaled<" # Width # ", " # Scale # ">"; 357 let PredicateMethod = "isSImm<" # width # ">"; 364 let PredicateMethod = "isImmInRange<" # Low # "," # High # ">"; 418 let PredicateMethod = "isImmInRange<0,63>"; 426 let PredicateMethod = "isImmInRange<0,63>"; 716 let PredicateMethod = "isBranchTarget<" # N # ">"; 981 let PredicateMethod = "isLogicalImm<int32_t>"; [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.td | 1140 let PredicateMethod = 1162 let PredicateMethod = "isImmTy<AMDGPUOperand::"#ImmTy#">"; 1332 let PredicateMethod = "isRegOrImmWithFP"#opSize#"InputMods"; 1337 let PredicateMethod = "isRegOrInlineImmWithFP"#opSize#"InputMods"; 1342 let PredicateMethod = "isVRegWithFP"#opSize#"InputMods"; 1349 let PredicateMethod = "isRegOrImmWithFPT16InputMods<" # 1359 let PredicateMethod = "isRegOrInlineImmWithFP16InputMods<" # 1401 let PredicateMethod = "isRegOrImmWithInt"#opSize#"InputMods"; 1405 let PredicateMethod = "isRegOrInlineImmWithInt"#opSize#"InputMods"; 1410 let PredicateMethod = "isRegOrImmWithIntT16InputMods<" # [all …]
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| H A D | AMDGPUInstructions.td | 110 let PredicateMethod = predicateMethod; 119 string PredicateMethod = "is"#name; 127 CustomOperandClass<name, optional, PredicateMethod, ParserMethod, 152 defvar OpPredicate = op.ParserMatchClass.PredicateMethod; 153 let PredicateMethod =
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| H A D | SMInstructions.td | 20 let PredicateMethod = SMEMOffsetMod.PredicateMethod;
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | AsmMatcherEmitter.cpp | 196 std::string PredicateMethod; member 1181 Entry->PredicateMethod = "<invalid>"; in getTokenClass() 1316 CI->PredicateMethod = ""; // unused in buildRegisterClasses() 1423 CI->PredicateMethod = SI->getValue().str(); in buildOperandClasses() 1426 CI->PredicateMethod = "is" + CI->ClassName; in buildOperandClasses() 2498 OS << " DiagnosticPredicate DP(Operand." << CI.PredicateMethod in emitValidateOperandClass()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kInstrControl.td | 407 let PredicateMethod = "isTrapImm"; 412 let PredicateMethod = "isBkptImm";
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| H A D | M68kInstrInfo.td | 403 let PredicateMethod = "isImm";
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaOperands.td | 216 let PredicateMethod = "isImm";
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZOperands.td | 57 let PredicateMethod = "isImm"; 62 let PredicateMethod = "isImmTLS";
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyInstrInfo.td | 160 let PredicateMethod = "isFPImm";
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstrFormats.td | 202 let PredicateMethod = "isVPTPred"; 208 let PredicateMethod = "isVPTPred"; 2780 let PredicateMethod = "isComplexRotation<" # Angle # ", " # Remainder # ">"; 2794 let PredicateMethod = "isMveSaturateOp";
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| H A D | ARMInstrMVE.td | 25 let PredicateMethod = "isITCondCodeRestrictedI"; 35 let PredicateMethod = "isITCondCodeRestrictedS"; 45 let PredicateMethod = "isITCondCodeRestrictedU"; 55 let PredicateMethod = "isITCondCodeRestrictedFP"; 121 let PredicateMethod = "isMemImm7ShiftedOffset<"#shift#",ARM::tGPRRegClassID>"; 139 let PredicateMethod = "isMemImm7ShiftedOffset<" # shift # 163 let PredicateMethod = "isMemImm7ShiftedOffset<" # shift # 202 let PredicateMethod = "isMemRegRQOffset<"#shift#">"; 223 let PredicateMethod = "isMemRegQOffset<"#shift#">"; 3849 let PredicateMethod = "isImmediate<1," # Bits # ">";
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchInstrInfo.td | 230 let PredicateMethod = "isGPR"; 450 let PredicateMethod = "isSImm26Operand"; 465 let PredicateMethod = "isSImm26Operand";
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