Home
last modified time | relevance | path

Searched refs:PredOp (Results 1 – 8 of 8) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonExpandCondsets.cpp219 unsigned DstSR, const MachineOperand &PredOp, bool PredSense,
230 const MachineOperand &PredOp, bool Cond,
646 unsigned DstR, unsigned DstSR, const MachineOperand &PredOp, in genCondTfrFor() argument
660 unsigned PredState = getRegState(PredOp) & ~RegState::Kill; in genCondTfrFor()
669 .addReg(PredOp.getReg(), PredState, PredOp.getSubReg()) in genCondTfrFor()
674 .addReg(PredOp.getReg(), PredState, PredOp.getSubReg()) in genCondTfrFor()
880 const MachineOperand &PredOp, bool Cond, in predicateAt() argument
909 MB.addReg(PredOp.getReg(), PredOp.isUndef() ? RegState::Undef : 0, in predicateAt()
910 PredOp.getSubReg()); in predicateAt()
H A DHexagonGenMux.cpp239 MachineOperand &PredOp = MI.getOperand(1); in genMuxInBlock() local
240 if (PredOp.isUndef()) in genMuxInBlock()
243 Register PR = PredOp.getReg(); in genMuxInBlock()
H A DHexagonISelLowering.cpp1108 SDValue PredOp = Op.getOperand(0); in LowerVSELECT() local
1120 DAG.getSelect(dl, WideTy, PredOp, in LowerVSELECT()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrCDE.td94 dag PredOp; // Input predicate operand
115 !con(params.Iops1, (ins imm_13b:$imm), params.PredOp),
131 !con(params.Iops2, (ins imm_9b:$imm), params.PredOp),
149 !con(params.Iops3, (ins imm_6b:$imm), params.PredOp),
191 let PredOp = !if(acc, (ins pred:$p), (ins));
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp1805 auto PredOp = ICmp.getOperand(1); in selectCompareBranchFedByICmp() local
1806 emitIntegerCompare(ICmp.getOperand(2), ICmp.getOperand(3), PredOp, MIB); in selectCompareBranchFedByICmp()
1808 static_cast<CmpInst::Predicate>(PredOp.getPredicate())); in selectCompareBranchFedByICmp()
2379 auto &PredOp = Cmp->getOperand(1); in earlySelect() local
2380 auto Pred = static_cast<CmpInst::Predicate>(PredOp.getPredicate()); in earlySelect()
2385 /*RHS=*/Cmp->getOperand(3), PredOp, MIB); in earlySelect()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp941 auto PredOp = PredIntr->getOperand(0); in tryCombineFromSVBoolBinOp() local
942 auto PredOpTy = cast<VectorType>(PredOp->getType()); in tryCombineFromSVBoolBinOp()
946 SmallVector<Value *> NarrowedBinOpArgs = {PredOp}; in tryCombineFromSVBoolBinOp()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp3483 MachineOperand &PredOp = Def->getOperand(1); in applyNotCmp() local
3485 (CmpInst::Predicate)PredOp.getPredicate()); in applyNotCmp()
3486 PredOp.setPredicate(NewP); in applyNotCmp()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGBuiltin.cpp21796 const Expr *PredOp = E->getArg(0); in EmitHexagonBuiltinExpr() local
21798 if (auto *Cast = dyn_cast<ImplicitCastExpr>(PredOp)) { in EmitHexagonBuiltinExpr()
21800 PredOp = Cast->getSubExpr(); in EmitHexagonBuiltinExpr()
21801 Ops.push_back(V2Q(EmitScalarExpr(PredOp))); in EmitHexagonBuiltinExpr()