| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | PostRASchedulerList.cpp | 78 class PostRAScheduler { class
86 PostRAScheduler(MachineFunction &MF, MachineLoopInfo *MLI, AliasAnalysis *AA, in PostRAScheduler() function in __anonf33d7a280111::PostRAScheduler
277 bool PostRAScheduler::run(MachineFunction &MF) { in run()
368 PostRAScheduler Impl(MF, MLI, AA, TM); in runOnMachineFunction()
381 PostRAScheduler Impl(MF, MLI, AA, TM); in run()
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| H A D | TargetSubtargetInfo.cpp | 50 return getSchedModel().PostRAScheduler; in enablePostRAScheduler()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kSchedule.td | 19 let PostRAScheduler = 0;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiSchedule.td | 45 let PostRAScheduler = 0;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCSchedule.h | 314 bool PostRAScheduler; // default value is false member
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleM4.td | 18 let PostRAScheduler = 1;
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| H A D | ARMScheduleM55.td | 89 let PostRAScheduler = 1;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86Schedule.td | 736 // and disables PostRAScheduler.
742 let PostRAScheduler = 0;
748 // Define a model with the PostRAScheduler enabled.
750 let PostRAScheduler = 1;
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| H A D | X86ScheduleSLM.td | 21 let PostRAScheduler = 1;
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| H A D | X86ScheduleAtom.td | 28 let PostRAScheduler = 1;
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| H A D | X86ScheduleBtVer2.td | 23 let PostRAScheduler = 1;
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| H A D | X86ScheduleZnver2.td | 22 let PostRAScheduler = 1;
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| H A D | X86ScheduleBdVer2.td | 29 let PostRAScheduler = 1; // Enable Post RegAlloc Scheduler pass.
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| H A D | X86ScheduleZnver1.td | 22 let PostRAScheduler = 1;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedThunderX.td | 25 let PostRAScheduler = 1; // Use PostRA scheduler.
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| H A D | AArch64SchedA55.td | 29 let PostRAScheduler = 1; // Enable PostRA scheduler pass.
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| H A D | AArch64SchedOryon.td | 23 let PostRAScheduler = 1; // Using PostRA sched.
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| H A D | AArch64SchedA510.td | 24 let PostRAScheduler = 1; // Enable PostRA scheduler pass.
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| H A D | AArch64SchedA320.td | 22 let PostRAScheduler = 1; // Enable PostRA scheduler pass.
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | SubtargetEmitter.cpp | 1457 bool PostRAScheduler = in emitProcessorModels() local
1460 OS << " " << (PostRAScheduler ? "true" : "false") << ", // " in emitProcessorModels()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SISchedule.td | 86 let PostRAScheduler = 1;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSchedule.td | 88 bit PostRAScheduler = false; // Enable Post RegAlloc Scheduler pass.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsScheduleGeneric.td | 28 let PostRAScheduler = 1;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZScheduleZEC12.td | 24 let PostRAScheduler = 1;
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| H A D | SystemZScheduleZ196.td | 24 let PostRAScheduler = 1;
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