Searched refs:PatchOpcodes (Results 1 – 6 of 6) sorted by relevance
| /freebsd/contrib/llvm-project/compiler-rt/lib/xray/ |
| H A D | xray_mips64.cpp | 22 enum PatchOpcodes : uint32_t { enum 104 Address[2] = encodeInstruction(PatchOpcodes::PO_SD, RegNum::RN_SP, in patchSled() 106 Address[3] = encodeInstruction(PatchOpcodes::PO_SD, RegNum::RN_SP, in patchSled() 108 Address[4] = encodeInstruction(PatchOpcodes::PO_LUI, 0x0, RegNum::RN_T9, in patchSled() 110 Address[5] = encodeInstruction(PatchOpcodes::PO_ORI, RegNum::RN_T9, in patchSled() 112 Address[6] = encodeSpecialInstruction(PatchOpcodes::PO_DSLL, 0x0, in patchSled() 114 Address[7] = encodeInstruction(PatchOpcodes::PO_ORI, RegNum::RN_T9, in patchSled() 116 Address[8] = encodeSpecialInstruction(PatchOpcodes::PO_DSLL, 0x0, in patchSled() 118 Address[9] = encodeInstruction(PatchOpcodes::PO_ORI, RegNum::RN_T9, in patchSled() 120 Address[10] = encodeInstruction(PatchOpcodes::PO_LUI, 0x0, RegNum::RN_T0, in patchSled() [all …]
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| H A D | xray_riscv.cpp | 22 enum PatchOpcodes : uint32_t { enum 161 const uint32_t LoadOp = PatchOpcodes::PO_LD; in patchSled() 162 const uint32_t StoreOp = PatchOpcodes::PO_SD; in patchSled() 164 const uint32_t LoadOp = PatchOpcodes::PO_LW; in patchSled() 165 const uint32_t StoreOp = PatchOpcodes::PO_SW; in patchSled() 176 Address[Idx++] = encodeUTypeInstruction(PatchOpcodes::PO_LUI, RegNum::RN_T1, in patchSled() 179 encodeITypeInstruction(PatchOpcodes::PO_ADDI, RegNum::RN_T1, in patchSled() 181 Address[Idx++] = encodeITypeInstruction(PatchOpcodes::PO_SLLI, in patchSled() 184 Address[Idx++] = encodeUTypeInstruction(PatchOpcodes::PO_LUI, RegNum::RN_RA, in patchSled() 187 PatchOpcodes::PO_ADDI, RegNum::RN_RA, RegNum::RN_RA, LoTracingHookAddr); in patchSled() [all …]
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| H A D | xray_mips.cpp | 22 enum PatchOpcodes : uint32_t { enum 104 Address[2] = encodeInstruction(PatchOpcodes::PO_SW, RegNum::RN_SP, in patchSled() 106 Address[3] = encodeInstruction(PatchOpcodes::PO_SW, RegNum::RN_SP, in patchSled() 108 Address[4] = encodeInstruction(PatchOpcodes::PO_LUI, 0x0, RegNum::RN_T9, in patchSled() 110 Address[5] = encodeInstruction(PatchOpcodes::PO_ORI, RegNum::RN_T9, in patchSled() 112 Address[6] = encodeInstruction(PatchOpcodes::PO_LUI, 0x0, RegNum::RN_T0, in patchSled() 114 Address[7] = encodeSpecialInstruction(PatchOpcodes::PO_JALR, RegNum::RN_T9, in patchSled() 116 Address[8] = encodeInstruction(PatchOpcodes::PO_ORI, RegNum::RN_T0, in patchSled() 118 Address[9] = encodeInstruction(PatchOpcodes::PO_LW, RegNum::RN_SP, in patchSled() 120 Address[10] = encodeInstruction(PatchOpcodes::PO_LW, RegNum::RN_SP, in patchSled() [all …]
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| H A D | xray_AArch64.cpp | 25 enum class PatchOpcodes : uint32_t { enum 67 *CurAddress = uint32_t(PatchOpcodes::PO_LdrX16_12); in patchSled() 69 *CurAddress = uint32_t(PatchOpcodes::PO_BlrX16); in patchSled() 75 *CurAddress = uint32_t(PatchOpcodes::PO_LdpX0X30SP_16); in patchSled() 79 uint32_t(PatchOpcodes::PO_StpX0X30SP_m16e), std::memory_order_release); in patchSled() 83 uint32_t(PatchOpcodes::PO_B32), std::memory_order_release); in patchSled()
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| H A D | xray_arm.cpp | 25 enum class PatchOpcodes : uint32_t { enum 112 *CurAddress = uint32_t(PatchOpcodes::PO_BlxIp); in patchSled() 114 *CurAddress = uint32_t(PatchOpcodes::PO_PopR0Lr); in patchSled() 118 uint32_t(PatchOpcodes::PO_PushR0Lr), std::memory_order_release); in patchSled() 122 uint32_t(PatchOpcodes::PO_B20), std::memory_order_release); in patchSled()
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| H A D | xray_hexagon.cpp | 23 enum PatchOpcodes : uint32_t { enum 131 WriteInstFlushCache(FirstAddress, uint32_t(PatchOpcodes::PO_JUMPI_14)); in patchSled()
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