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Searched refs:ParentA (Results 1 – 3 of 3) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DReachingDefAnalysis.cpp292 MachineBasicBlock *ParentA = A->getParent(); in hasSameReachingDef() local
294 if (ParentA != ParentB) in hasSameReachingDef()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DVPlanTransforms.cpp747 const VPBlockBase *ParentA = A->getParent(); in properlyDominates() local
749 if (ParentA == ParentB) in properlyDominates()
756 return VPDT.properlyDominates(ParentA, ParentB); in properlyDominates()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp560 bool matchVPTERNLOG(SDNode *Root, SDNode *ParentA, SDNode *ParentB,
4521 bool X86DAGToDAGISel::matchVPTERNLOG(SDNode *Root, SDNode *ParentA, in matchVPTERNLOG() argument
4525 assert(A.isOperandOf(ParentA) && B.isOperandOf(ParentB) && in matchVPTERNLOG()
4556 } else if (tryFoldLoadOrBCast(Root, ParentA, A, Tmp0, Tmp1, Tmp2, Tmp3, in matchVPTERNLOG()
4687 SDNode *ParentA = N; in tryVPTERNLOG() local
4709 PeekThroughNot(A, ParentA, TernlogMagicA); in tryVPTERNLOG()
4735 return matchVPTERNLOG(N, ParentA, ParentB, ParentC, A, B, C, Imm); in tryVPTERNLOG()