| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SILoadStoreOptimizer.cpp | 214 const CombineInfo &Paired);
216 CombineInfo &Paired, bool Modify = false);
218 const CombineInfo &Paired);
219 unsigned getNewOpcode(const CombineInfo &CI, const CombineInfo &Paired);
221 const CombineInfo &Paired);
224 const CombineInfo &Paired) const;
227 CombineInfo *checkAndPrepareMerge(CombineInfo &CI, CombineInfo &Paired);
229 void copyToDestRegs(CombineInfo &CI, CombineInfo &Paired,
232 Register copyFromSrcRegs(CombineInfo &CI, CombineInfo &Paired,
239 mergeRead2Pair(CombineInfo &CI, CombineInfo &Paired,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVMoveMerger.cpp | 38 MachineBasicBlock::iterator Paired, unsigned Opcode);
83 MachineBasicBlock::iterator Paired,
89 DestSourcePair PairedRegs = TII->isCopyInstrImpl(*Paired).value(); in mergePairedInsns()
94 if (NextI == Paired) in mergePairedInsns()
118 Paired->eraseFromParent(); in mergePairedInsns()
199 MachineBasicBlock::iterator Paired = in mergeMoveSARegPair()
202 if (Paired != E) { in mergeMoveSARegPair()
203 MBBI = mergePairedInsns(MBBI, Paired, Opcode); in mergeMoveSARegPair()
85 mergePairedInsns(MachineBasicBlock::iterator I,MachineBasicBlock::iterator Paired,unsigned Opcode) mergePairedInsns() argument
201 MachineBasicBlock::iterator Paired = mergeMoveSARegPair() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64LoadStoreOptimizer.cpp | 161 MachineBasicBlock::iterator Paired,
859 MachineBasicBlock::iterator Paired, in mergePairedInsns() argument
867 if (NextI == Paired) in mergePairedInsns()
949 forAllMIsUntilDef(MergeForward ? *I : *std::prev(Paired), RegToRename, TRI, in mergePairedInsns()
967 MergeForward ? std::next(Paired) : Paired)) in mergePairedInsns()
981 MachineBasicBlock::iterator InsertionPoint = MergeForward ? Paired : I; in mergePairedInsns()
985 MergeForward ? AArch64InstrInfo::getLdStBaseOp(*Paired) in mergePairedInsns()
989 int PairedOffset = AArch64InstrInfo::getLdStOffsetOp(*Paired).getImm(); in mergePairedInsns()
990 bool PairedIsUnscaled = TII->hasUnscaledLdStOffset(Paired->getOpcode()); in mergePairedInsns()
995 int MemSize = TII->getMemScale(*Paired); in mergePairedInsns()
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| H A D | AArch64Features.td | 621 "IsPaired128Slow", "true", "Paired 128 bit loads and stores are slow">;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.cpp | 363 Register Paired = Hint.second; in getRegAllocationHints() local
364 if (!Paired) in getRegAllocationHints()
368 if (Paired.isPhysical()) { in getRegAllocationHints()
369 PairedPhys = Paired; in getRegAllocationHints()
370 } else if (VRM && VRM->hasPhys(Paired)) { in getRegAllocationHints()
371 PairedPhys = getPairedGPR(VRM->getPhys(Paired), Odd, this); in getRegAllocationHints()
383 MCPhysReg Paired = getPairedGPR(Reg, !Odd, this); in getRegAllocationHints() local
384 if (!Paired || MRI.isReserved(Paired)) in getRegAllocationHints()
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| H A D | ARMParallelDSP.cpp | 69 bool Paired = false; member
149 Mul0->Paired = true; in AddMulPair()
150 Mul1->Paired = true; in AddMulPair()
598 if (PMul0->Paired) in CreateParallelPairs()
606 if (PMul1->Paired) in CreateParallelPairs()
671 if (MulCand->Paired) in InsertParallelMACs()
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| /freebsd/contrib/llvm-project/llvm/tools/llvm-readobj/ |
| H A D | ARMWinEHPrinter.cpp | 878 // Whether the instruction is paired. (Paired instructions are required in opcode_save_any_reg()
880 bool Paired = (OC[Offset + 1] & 0x40) == 0x40; in opcode_save_any_reg()
892 if (!Writeback && !Paired && RegKind != 2) in opcode_save_any_reg()
904 if (Paired) in opcode_save_any_reg()
914 if (Paired) { in opcode_save_any_reg()
933 if (Paired) in opcode_save_any_reg()
879 bool Paired = (OC[Offset + 1] & 0x40) == 0x40; opcode_save_any_reg() local
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| /freebsd/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCWin64EH.cpp | 627 int Paired = Op % 2; in ARM64EmitUnwindCode()
630 if (Writeback || Paired || Mode == 2) in ARM64EmitUnwindCode()
637 b = inst.Register | (Writeback << 5) | (Paired << 6);
619 int Paired = Op % 2; ARM64EmitUnwindCode() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCScheduleP9.td | 149 // Paired ('P') - certain cracked and expanded iops are paired such that they
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| H A D | PPCInstrP10.td | 1191 // Intrinsics for Paired Vector Loads.
1197 // Intrinsics for Paired Vector Stores.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 229 bool parseDirectiveSEHSaveAnyReg(SMLoc L, bool Paired, bool Writeback);
7564 bool AArch64AsmParser::parseDirectiveSEHSaveAnyReg(SMLoc L, bool Paired, in parseDirectiveSEHSaveAnyReg() argument
7575 if (Offset < 0 || Offset % (Paired || Writeback ? 16 : 8)) in parseDirectiveSEHSaveAnyReg()
7584 if (Paired) { in parseDirectiveSEHSaveAnyReg()
7599 if (Offset < 0 || Offset % (Paired || Writeback ? 16 : 8)) in parseDirectiveSEHSaveAnyReg()
7601 if (Paired) { in parseDirectiveSEHSaveAnyReg()
7618 if (Paired) { in parseDirectiveSEHSaveAnyReg()
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| /freebsd/contrib/ncurses/misc/ |
| H A D | terminfo.src | 25682 # * Paired-attribute fixes to various terminals.
|