Searched refs:PPR (Results 1 – 8 of 8) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SVEInstrInfo.td | 1394 (!cast<Instruction>(Inst # _SCALED) PPR:$gp, GPR64:$base, ZPR:$offs)>; 1397 (!cast<Instruction>(Inst # _SXTW_SCALED) PPR:$gp, GPR64:$base, ZPR:$offs)>; 1400 (!cast<Instruction>(Inst # _UXTW_SCALED) PPR:$gp, GPR64:$base, ZPR:$offs)>; 1406 (!cast<Instruction>(Inst # _IMM) PPR:$gp, ZPR:$ptrs, ImmTy:$imm)>; 1409 (!cast<Instruction>(Inst) PPR:$gp, GPR64:$base, ZPR:$offs)>; 1412 (!cast<Instruction>(Inst # _SXTW) PPR:$gp, GPR64:$base, ZPR:$offs)>; 1415 (!cast<Instruction>(Inst # _UXTW) PPR:$gp, GPR64:$base, ZPR:$offs)>; 1420 (Inst PPR:$gp, GPR64:$base, ZPR:$offs)>; 1628 (!cast<Instruction>(Inst # _SCALED) ZPR:$data, PPR:$gp, GPR64:$base, ZPR:$offs)>; 1631 (!cast<Instruction>(Inst # _SXTW_SCALED) ZPR:$data, PPR:$gp, GPR64:$base, ZPR:$offs)>; [all …]
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| H A D | AArch64RegisterInfo.td | 997 def PPR : PPRClass<0, 15> { 1018 def PPRAsmOpAny : PPRAsmOperand<"PredicateAny", "PPR", 0>; 1019 def PPRAsmOp8 : PPRAsmOperand<"PredicateB", "PPR", 8>; 1020 def PPRAsmOp16 : PPRAsmOperand<"PredicateH", "PPR", 16>; 1021 def PPRAsmOp32 : PPRAsmOperand<"PredicateS", "PPR", 32>; 1022 def PPRAsmOp64 : PPRAsmOperand<"PredicateD", "PPR", 64>; 1028 def PPRAny : PPRRegOp<"", PPRAsmOpAny, ElementSizeNone, PPR>; 1029 def PPR8 : PPRRegOp<"b", PPRAsmOp8, ElementSizeB, PPR>; 1030 def PPR16 : PPRRegOp<"h", PPRAsmOp16, ElementSizeH, PPR>; 1031 def PPR32 : PPRRegOp<"s", PPRAsmOp32, ElementSizeS, PPR>; [all …]
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| H A D | AArch64FrameLowering.cpp | 3186 enum RegType { GPR, FPR64, FPR128, PPR, ZPR, VG } Type; enumerator 3193 bool isScalable() const { return Type == PPR || Type == ZPR; } in isScalable() 3285 RPI.Type = RegPairInfo::PPR; in computeCalleeSaveRegisterPairs() 3324 case RegPairInfo::PPR: in computeCalleeSaveRegisterPairs() 3531 case RegPairInfo::PPR: in spillCalleeSavedRegisters() 3624 return c.Reg1 == RegPairInfo::PPR; in spillCalleeSavedRegisters() 3683 if (RPI.Type == RegPairInfo::ZPR || RPI.Type == RegPairInfo::PPR) { in spillCalleeSavedRegisters() 3723 auto IsPPR = [](const RegPairInfo &c) { return c.Type == RegPairInfo::PPR; }; in restoreCalleeSavedRegisters() 3761 case RegPairInfo::PPR: in restoreCalleeSavedRegisters() 5708 PPR = 1 << 1, // A predicate register. enumerator [all …]
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| H A D | SVEInstrFormats.td | 7001 …def : Pat<(uxtw_op (nxv4i32 ZPR:$data), (nxv4i1 PPR:$gp), GPR64sp:$base, (nxv4i32 ZPR:$offsets), v… 7002 … (!cast<Instruction>(NAME # _UXTW_SCALED) ZPR:$data, PPR:$gp, GPR64sp:$base, ZPR:$offsets)>; 7003 …def : Pat<(sxtw_op (nxv4i32 ZPR:$data), (nxv4i1 PPR:$gp), GPR64sp:$base, (nxv4i32 ZPR:$offsets), v… 7004 … (!cast<Instruction>(NAME # _SXTW_SCALED) ZPR:$data, PPR:$gp, GPR64sp:$base, ZPR:$offsets)>; 7021 …def : Pat<(uxtw_op (nxv2i64 ZPR:$data), (nxv2i1 PPR:$gp), GPR64sp:$base, (nxv2i64 ZPR:$offsets), v… 7022 … (!cast<Instruction>(NAME # _UXTW_SCALED) ZPR:$data, PPR:$gp, GPR64sp:$base, ZPR:$offsets)>; 7023 …def : Pat<(sxtw_op (nxv2i64 ZPR:$data), (nxv2i1 PPR:$gp), GPR64sp:$base, (nxv2i64 ZPR:$offsets), v… 7024 … (!cast<Instruction>(NAME # _SXTW_SCALED) ZPR:$data, PPR:$gp, GPR64sp:$base, ZPR:$offsets)>; 7041 …def : Pat<(uxtw_op (nxv2i64 ZPR:$data), (nxv2i1 PPR:$gp), GPR64sp:$base, (nxv2i64 ZPR:$offsets), v… 7042 (!cast<Instruction>(NAME # _UXTW) ZPR:$data, PPR:$gp, GPR64sp:$base, ZPR:$offsets)>; [all …]
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| /freebsd/sys/dev/aic7xxx/ |
| H A D | aic79xx.reg | 2482 * Data Transfer Negotiation Data - PPR Options
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| H A D | aic79xx.seq | 569 * agreement. Since SPI4 only allows target reset or PPR
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| /freebsd/contrib/one-true-awk/testdir/ |
| H A D | funstack.in | 5588 @Article{Lesk:1972:PPR,
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| /freebsd/contrib/ncurses/misc/ |
| H A D | terminfo.src | 24879 # PPR Page Position Forward * \E [ Pn SPC Q 1 FE -
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