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Searched refs:POST_INC (Results 1 – 17 of 17) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelDAGToDAG.cpp150 (AM != ISD::POST_INC && AM != ISD::PRE_DEC)) { in selectIndexedLoad()
193 LD->getAddressingMode() != ISD::POST_INC) in selectIndexedProgMemLoad()
H A DAVRISelLowering.cpp123 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in AVRTargetLowering()
124 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in AVRTargetLowering()
127 setIndexedStoreAction(ISD::POST_INC, MVT::i8, Legal); in AVRTargetLowering()
128 setIndexedStoreAction(ISD::POST_INC, MVT::i16, Legal); in AVRTargetLowering()
1178 AM = ISD::POST_INC; in getPostIndexedAddressParts()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h1523 enum MemIndexedMode { UNINDEXED = 0, PRE_INC, PRE_DEC, POST_INC, POST_DEC }; enumerator
H A DBasicTTIImpl.h202 return ISD::POST_INC; in getISDIndexedMode()
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelDAGToDAG.cpp310 if (AM != ISD::POST_INC || LD->getExtensionType() != ISD::NON_EXTLOAD) in isValidIndexedLoad()
H A DMSP430ISelLowering.cpp61 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in MSP430TargetLowering()
62 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in MSP430TargetLowering()
1358 AM = ISD::POST_INC; in getPostIndexedAddressParts()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp842 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetReg()
878 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImmPre()
898 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImm()
977 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode3Offset()
1095 if (AM != ISD::POST_INC) in SelectAddrMode6Offset()
1406 OffImm = ((AM == ISD::PRE_INC) || (AM == ISD::POST_INC)) in SelectT2AddrModeImm8Offset()
1475 ((AM == ISD::PRE_INC) || (AM == ISD::POST_INC)) in SelectT2AddrModeImm7Offset()
1678 if (AM != ISD::POST_INC || LD->getExtensionType() != ISD::NON_EXTLOAD || in tryT1IndexedLoad()
H A DARMISelLowering.cpp1138 setIndexedLoadAction(ISD::POST_INC, MVT::i32, Legal); in ARMTargetLowering()
1139 setIndexedStoreAction(ISD::POST_INC, MVT::i32, Legal); in ARMTargetLowering()
20037 AM = ISD::POST_INC; in getPostIndexedAddressParts()
20071 AM = isInc ? ISD::POST_INC : ISD::POST_DEC; in getPostIndexedAddressParts()
H A DARMInstrMVE.td7122 return AM == ISD::POST_INC || AM == ISD::POST_DEC;
7216 return cast<MaskedStoreSDNode>(N)->isTruncatingStore() && (AM == ISD::POST_INC || AM == ISD::POST_DEC);
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp569 case ISD::POST_INC: return "<post-inc>"; in getIndexedModeName()
H A DDAGCombiner.cpp18695 if (getCombineLoadStoreParts(Use, ISD::POST_INC, ISD::POST_DEC, IsLoad, in shouldCombineToPostInc()
18721 if (!getCombineLoadStoreParts(N, ISD::POST_INC, ISD::POST_DEC, IsLoad, in getPostIndexedLoadStoreOp()
18824 (AM == ISD::PRE_INC || AM == ISD::POST_INC ? ISD::ADD : ISD::SUB); in SplitIndexingFromLoad()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp764 assert((AM == ISD::PRE_INC || AM == ISD::POST_INC) && in tryIndexedLoad()
767 bool IsPost = AM == ISD::POST_INC; in tryIndexedLoad()
1534 if (Load->getAddressingMode() != ISD::POST_INC) in Select()
H A DRISCVISelLowering.cpp1428 for (unsigned im : {ISD::PRE_INC, ISD::POST_INC}) { in RISCVTargetLowering()
1444 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in RISCVTargetLowering()
1445 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in RISCVTargetLowering()
1446 setIndexedLoadAction(ISD::POST_INC, MVT::i32, Legal); in RISCVTargetLowering()
1448 setIndexedStoreAction(ISD::POST_INC, MVT::i8, Legal); in RISCVTargetLowering()
1449 setIndexedStoreAction(ISD::POST_INC, MVT::i16, Legal); in RISCVTargetLowering()
1450 setIndexedStoreAction(ISD::POST_INC, MVT::i32, Legal); in RISCVTargetLowering()
21267 AM = ISD::POST_INC; in getPostIndexedAddressParts()
21289 AM = ISD::POST_INC;
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp650 AM = ISD::POST_INC; in getPostIndexedAddressParts()
1822 setIndexedLoadAction(ISD::POST_INC, VT, Legal); in HexagonTargetLowering()
1823 setIndexedStoreAction(ISD::POST_INC, VT, Legal); in HexagonTargetLowering()
H A DHexagonISelLoweringHVX.cpp193 setIndexedLoadAction(ISD::POST_INC, T, Legal); in initializeHVXLowering()
194 setIndexedStoreAction(ISD::POST_INC, T, Legal); in initializeHVXLowering()
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td1393 return AM == ISD::POST_INC || AM == ISD::POST_DEC;
1399 return AM == ISD::POST_INC || AM == ISD::POST_DEC;
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp25752 AM = ISD::POST_INC; in getPostIndexedAddressParts()