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Searched refs:PLL_HPLL (Results 1 – 25 of 29) sorted by relevance

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/freebsd/sys/dev/clk/rockchip/
H A Drk3568_pmucru.c107 RK_PLL(PLL_HPLL, "hpll", mux_pll_p, 2, 2),
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3566-radxa-cm3-io.dts268 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3568-fastrhino-r66s.dtsi454 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-radxa-zero-3.dtsi517 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-box-demo.dts469 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3568-nanopi-r5s.dtsi574 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3568-wolfvision-pf5.dts515 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-lubancat-1.dts577 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-odroid-m1s.dts650 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3568-roc-pc.dts634 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3568-evb1-v10.dts676 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3568-odroid-m1.dts728 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-lckfb-tspi.dts712 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-roc-pc.dts687 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3568-lubancat-2.dts677 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-rock-3c.dts713 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-anbernic-rgxx3.dtsi706 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-soquartz.dtsi672 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-orangepi-3b.dtsi665 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3566-quartz64-b.dts727 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3568-rock-3b.dts768 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3568-bpi-r2-pro.dts841 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
H A Drk3568-rock-3a.dts856 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Drockchip,rv1126-cru.h68 #define PLL_HPLL 4 macro
H A Drk3568-cru.h14 #define PLL_HPLL 2 macro

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