| /freebsd/sys/contrib/device-tree/include/dt-bindings/clock/ |
| H A D | rk3188-cru-common.h | 13 #define PLL_CPLL 3 macro
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| H A D | rk3128-cru.h | 13 #define PLL_CPLL 3 macro
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| H A D | rk3228-cru.h | 13 #define PLL_CPLL 3 macro
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| H A D | rk3328-cru.h | 13 #define PLL_CPLL 3 macro
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| H A D | rk3368-cru.h | 13 #define PLL_CPLL 4 macro
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| H A D | rk3288-cru.h | 13 #define PLL_CPLL 3 macro
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| H A D | px30-cru.h | 9 #define PLL_CPLL 3 macro
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| H A D | rockchip,rv1126-cru.h | 67 #define PLL_CPLL 3 macro
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| H A D | rockchip,rk3576-cru.h | 20 #define PLL_CPLL 4 macro
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| H A D | rk3399-cru.h | 14 #define PLL_CPLL 4 macro
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| H A D | rockchip,rk3588-cru.h | 20 #define PLL_CPLL 5 macro
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| H A D | rk3568-cru.h | 72 #define PLL_CPLL 3 macro
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| /freebsd/sys/dev/clk/rockchip/ |
| H A D | rk3399_cru_dt.h | 7 #define PLL_CPLL 4 macro
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| H A D | rk3328_cru.c | 59 #define PLL_CPLL 3 macro
699 .id = PLL_CPLL,
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| H A D | rk3288_cru.c | 583 PLL(PLL_CPLL, "cpll", CRU_CPLL_CON(0), 8),
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| H A D | rk3399_cru.c | 786 PLL(PLL_CPLL, "cpll", 0x60),
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| H A D | rk3568_cru.c | 296 RK_PLL(PLL_CPLL, "cpll", mux_pll_p, 3, 4),
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| /freebsd/sys/contrib/device-tree/src/arm64/rockchip/ |
| H A D | rk3368-r88.dts | 216 assigned-clock-parents = <&cru PLL_CPLL>;
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| H A D | rk3368-lba3368.dts | 558 assigned-clock-parents = <&cru PLL_CPLL>;
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| H A D | rk3399-gru-scarlet.dtsi | 368 <&cru PLL_GPLL>, <&cru PLL_CPLL>,
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| H A D | rk3399-gru.dtsi | 352 <&cru PLL_GPLL>, <&cru PLL_CPLL>,
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| H A D | rk3328.dtsi | 838 <&cru PLL_GPLL>, <&cru PLL_CPLL>,
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| /freebsd/sys/contrib/device-tree/src/arm/rockchip/ |
| H A D | rk3188-bqedison2qc.dts | 227 assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>,
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| H A D | rk3066a.dtsi | 232 assigned-clocks = <&cru PLL_CPLL>, <&cru PLL_GPLL>,
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| H A D | rk322x.dtsi | 498 <&cru PLL_CPLL>, <&cru ACLK_PERI>,
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