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Searched refs:PLL_BASE_ENABLE (Results 1 – 2 of 2) sorted by relevance

/freebsd/sys/arm/nvidia/tegra124/
H A Dtegra124_clk_pll.c67 #define PLL_BASE_ENABLE (1 << 30) macro
420 reg |= PLL_BASE_ENABLE; in pll_enable()
433 reg &= ~PLL_BASE_ENABLE; in pll_disable()
695 *enabled = reg & PLL_BASE_ENABLE ? true: false; in tegra124_pll_get_gate()
741 reg |= PLL_BASE_ENABLE; in pll_set_std()
753 reg &= ~PLL_BASE_ENABLE; in pll_set_std()
915 reg &= ~PLL_BASE_ENABLE; in pllx_set_freq()
935 reg |= PLL_BASE_ENABLE; in pllx_set_freq()
942 reg &= ~PLL_BASE_ENABLE; in pllx_set_freq()
1006 if (reg & PLL_BASE_ENABLE) { in tegra124_pll_init()
/freebsd/sys/arm64/nvidia/tegra210/
H A Dtegra210_clk_pll.c78 #define PLL_BASE_ENABLE (1 << 30) macro
606 reg |= PLL_BASE_ENABLE; in pll_enable()
619 reg &= ~PLL_BASE_ENABLE; in pll_disable()
893 *enabled = reg & PLL_BASE_ENABLE ? true: false; in tegra210_pll_get_gate()
939 reg |= PLL_BASE_ENABLE; in pll_set_std()
951 reg &= ~PLL_BASE_ENABLE; in pll_set_std()
1317 if (reg & PLL_BASE_ENABLE) { in tegra210_pll_init()